公开(公告)号：EP3387674A1

公开(公告)日：2018-10-17

申请号：EP16819775.4

申请日：2016-12-07

申请人： Microchip Technology Incorporated

发明人： DIX, Greg ,  YACH, Randy L. ,  MAZZILLI, Francesco

IPC分类号： H01L23/522 ,  H01L23/00 ,  H01L49/02

CPC分类号： H01L28/60 ,  H01L21/31105 ,  H01L21/52 ,  H01L23/3142 ,  H01L23/48 ,  H01L23/5222 ,  H01L23/5223 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/42 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0652 ,  H01L28/00 ,  H01L28/40 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/14104 ,  H01L2224/1412 ,  H01L2224/16145 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2924/00014 ,  H01L2924/1205 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/0665

摘要： The teachings of the present disclosure may be applied to the manufacture and design of capacitors. In some embodiments of these teachings, a capacitor may be formed on a heavily doped substrate. For example, a method for manufacturing a capacitor may include: depositing an oxide layer on a first side of a heavily doped substrate; depositing a first metal layer on the oxide layer; and depositing a second metal layer on a second side of the heavily doped substrate.

公开(公告)号：EP3384530A1

公开(公告)日：2018-10-10

申请号：EP17707450.7

申请日：2017-02-10

申请人： Apple Inc.

发明人： HU, Hsin-Hua ,  PEDDER, James E. ,  BITA, Ion ,  CHOI, Jaein ,  TANG, Hairong ,  HSU, Chin Wei ,  CHALASANI, Sandeep ,  CHEN, Chih-Lei ,  ONO, Shinya ,  KANG, Sunggu ,  HUANG, Jung Yen ,  TSAI, Lun

IPC分类号： H01L25/075 ,  H01L25/16 ,  H01L23/00

CPC分类号： H01L25/0753 ,  H01L23/3157 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/16 ,  H01L25/167 ,  H01L2224/10145 ,  H01L2224/11002 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1601 ,  H01L2224/16112 ,  H01L2224/16238 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11

摘要： Micro LED and microdriver chip integration schemes are described. In an embodiment a microdriver chip includes a plurality of trenches formed in a bottom surface of the microdriver chip, with each trench surrounding a conductive stud extending below a bottom surface of the microdriver chip body. Integration schemes are additionally described for providing electrical connection to conductive terminal contacts and micro LEDs bonded to a display substrate and adjacent to a microdriver chip.

公开(公告)号：EP2126971B1

公开(公告)日：2018-08-29

申请号：EP08713435.9

申请日：2008-01-03

申请人： Analog Devices, Inc.

发明人： O'DONNELL, Alan ,  KIERSE, Oliver ,  GOIDA, Thomas, M.

IPC分类号： H01L23/31 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/566 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/3171 ,  H01L23/3178 ,  H01L23/3185 ,  H01L2224/13022 ,  H01L2224/73203 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2224/0401 ,  H01L2224/03

摘要： An electronics package includes a wafer die substrate containing electronic circuits and having a top surface and a bottom surface. A top protective layer is substantially thinner than the substrate and covers the top surface. A bottom protective layer is substantially thinner than the substrate and covers the bottom surface. Circuit contacts are distributed about the bottom protective layer for electrically coupling the substrate electronic circuits to external electronic circuits.

公开(公告)号：EP3279925A1

公开(公告)日：2018-02-07

申请号：EP16773200.7

申请日：2016-03-31

申请人： Hamamatsu Photonics K.K.

发明人： HOSOKAWA Noburo ,  INOUE Nao ,  SHIBAYAMA Katsumi

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L27/14687 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/522 ,  H01L23/532 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14643 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/02161 ,  H01L31/022408 ,  H01L31/103 ,  H01L31/107 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0235 ,  H01L2224/0236 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/02381 ,  H01L2224/0345 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/13007 ,  H01L2224/13009 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/351 ,  H01L2924/00014

摘要： A semiconductor device 1 includes a semiconductor substrate 2 in which a through hole 7 is formed, a first wiring 3 that is provided on a first surface 2a of the semiconductor substrate 2, an insulating layer 10 provided on an inner surface 7c of the through hole 7 and a second surface 2b of the semiconductor substrate 2, and a second wiring 8 that is provided on a surface 10b of the insulating layer 10 and electrically connected to the first wiring 3 in an opening 10a. The surface 10b of the insulating layer 10 includes a first region 11, a second region 12, a third region 13, a fourth region 14 that is curved to continuously connect the first region 11 and the second region 12, and a fifth region 15 that is curved to continuously connect the second region 12 and the third region 13. An average inclination angle of the second region 12 is smaller than an average inclination angle of the first region 11 and is smaller than an average inclination angle of the inner surface 7c.

摘要翻译： 半导体装置1具有：形成有贯通孔7的半导体基板2;设置在半导体基板2的第1面2a上的第1布线3;设置在该贯通孔的内表面7c上的绝缘层10 7和半导体衬底2的第二表面2b;以及第二布线8，设置在绝缘层10的表面10b上并且在开口10a中与第一布线3电连接。 绝缘层10的表面10b包括第一区域11，第二区域12，第三区域13，弯曲以连续连接第一区域11和第二区域12的第四区域14，以及第五区域15 弯曲以连续地连接第二区域12和第三区域13.第二区域12的平均倾斜角度小于第一区域11的平均倾斜角度并且小于内表面7c的平均倾斜角度。

公开(公告)号：EP2359396A4

公开(公告)日：2018-01-10

申请号：EP09837818

申请日：2009-12-07

申请人： INTEL CORP

发明人： LEE KEVIN J

IPC分类号： H01L21/60

CPC分类号： H01L23/49816 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/02175 ,  H01L2224/0219 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/16112 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/3841 ,  H01L2224/29099 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/0665

摘要： An apparatus comprises a semiconductor substrate having a device layer, a plurality of metallization layers, a passivation layer, and a metal bump formed on the passivation layer that is electrically coupled to at least one of the metallization layers. The apparatus further includes a solder limiting layer formed on the passivation layer that masks an outer edge of the top surface of the metal bump, thereby making the outer edge of the top surface non-wettable to a solder material.

公开(公告)号：EP3123505A4

公开(公告)日：2017-11-22

申请号：EP14886908

申请日：2014-03-28

申请人： INTEL CORP

发明人： KANG JIHO ,  KOTHARI HITEN ,  MONTAROU CAROLE C ,  YEOH ANDREW W

IPC分类号： H01L23/485 ,  H01L21/60 ,  H01L23/31

CPC分类号： H01L24/13 ,  H01L23/291 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/03831 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An embodiment includes a semiconductor structure comprising: a backend portion including a plurality of metal layers between bottom and top metal layers; the top metal layer including a top metal layer portion having first and second opposing sidewall surfaces and a top surface that couples the sidewall surfaces to one another; an insulator layer directly contacting the top surface; and a via coupling a contact bump to the top metal layer portion; wherein a first vertical axis, orthogonal to a substrate coupled to the backend portion, intercepts the contact bump, the nitride layer, the via, and the top metal layer portion. Other embodiments are described herein.

公开(公告)号：EP3193366A3

公开(公告)日：2017-08-16

申请号：EP17159006.0

申请日：2009-07-23

申请人： ATI Technologies ULC

发明人： MCLELLAN, Robert Neil ,  GUO, Fei ,  CHUNG, Daniel ,  CHEUNG, Terence

IPC分类号： H01L23/522 ,  H01L23/485

CPC分类号： H01L23/5223 ,  H01G4/008 ,  H01G4/01 ,  H01G4/33 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/642 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05093 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05576 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1133 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/14133 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A method of manufacturing a capacitor in a semiconductor chip; the semiconductor chip manufactured with this method. The method comprises forming a first conductor structure on a semiconductor chip to serve as a first capacitor plate, the first conductor structure including a layer, the layer having a first plurality of commonly tied lines, forming a passivation structure on the first conductor structure, forming a first under bump metallization structure on the passivation structure overlapping at least a portion of the first plurality of commonly tied lines to serve as a second capacitor plate, and applying a polymer layer to the under bump metallization structure to provide structural protection for the under bump metallization structure.

公开(公告)号：EP3139404A1

公开(公告)日：2017-03-08

申请号：EP16183620.0

申请日：2016-08-10

申请人： Renesas Electronics Corporation

发明人： YAJIMA, Akira

IPC分类号： H01L21/60 ,  H01L23/544 ,  H01L23/485

CPC分类号： H01L22/32 ,  G11C29/06 ,  G11C29/48 ,  G11C2029/5602 ,  H01L21/324 ,  H01L21/47635 ,  H01L22/14 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/43 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/03009 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05583 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2224/06102 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48138 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2924/014

摘要： To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.

摘要翻译： 为了通过抑制在半导体器件的测试中的焊料的不良接合来提高测试的可靠性，制造半导体器件的方法包括：制备半导体晶片，其包括设置有第一盖膜的第一焊盘电极和第二焊盘 电极设置有第二盖膜。 此外，形成包括第一焊盘电极上的第一开口和第二焊盘电极上的第二开口的聚酰亚胺层，然后形成经由第二开口连接到第二焊盘电极的重排布线。 接下来，在聚酰亚胺层中形成开口，使得有机反应层残留在重排布线的第一焊盘电极和凸起焊盘的每一个上，然后对半导体晶片进行热处理，然后形成凸块 在重新布线上。

公开(公告)号：EP1760782B1

公开(公告)日：2016-11-02

申请号：EP06018012.2

申请日：2006-08-29

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Sunohara, Masahiro ,  Higashi, Mitsutoshi

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05026 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/06182 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

公开(公告)号：EP2916169A4

公开(公告)日：2016-10-19

申请号：EP13850182

申请日：2013-10-09

申请人： HITACHI CHEMICAL CO LTD

发明人： AOKI YU ,  NOBE SHIGERU ,  MATSUTANI HIROSHI ,  KASUYA KEI ,  TANIMOTO AKITOSHI ,  TAHARA SHINGO

IPC分类号： G03F7/023 ,  G03F7/004 ,  H01L21/027

CPC分类号： H01L21/0274 ,  C08F8/12 ,  C08F12/22 ,  C08F112/14 ,  C08F212/14 ,  C08F2800/10 ,  C08L25/18 ,  C09D125/18 ,  G03F7/0233 ,  G03F7/038 ,  G03F7/0388 ,  G03F7/40 ,  H01L21/02118 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/5329 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05099 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/10126 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2924/00014 ,  H01L2924/014 ,  C08F212/08 ,  C08L33/08 ,  C08F2220/1825 ,  C08F220/06 ,  C08F2220/1883 ,  C08F220/20 ,  C08F226/06 ,  C08F220/34

摘要： Disclosed is a photosensitive resin composition comprising (A) an alkali-soluble resin having a structural unit represented by the following formula (1), (B) a compound that generates an acid by light, (C) a thermal crosslinking agent, and (D) an acryl resin having a structural unit represented by the following formula (2): wherein R 1 represents a hydrogen atom or a methyl group; R 2 represents an alkyl group having 1 to 10 carbon atoms, or the like; and a represents an integer of 0 to 3, b represents an integer of 1 to 3, and the total of a and b is 5 or less, and wherein R 3 represents a hydrogen atom or a methyl group; and R 4 represents a hydroxyalkyl group having 2 to 20 carbon atoms.