公开(公告)号：EP4152147A1

公开(公告)日：2023-03-22

申请号：EP22188194.9

申请日：2022-08-02

申请人： Intel Corporation

发明人： Boemer, Fabian ,  Gopal, Vinodh ,  Seifu, Gelila ,  Kim, Sejun ,  Crawford, Jack

IPC分类号： G06F9/30

摘要： One embodiment provides a processor comprising first circuitry to decode an instruction into a decoded instruction, the instruction to indicate a first source operand and a second source operand and second circuitry including a processing resource to execute the decoded instruction, wherein responsive to the decoded instruction, the processing resource is to output a result of first source operand data minus second source operand data in response to a determination by the processing resource that the first source operand data is greater than or equal to the second source operand data, otherwise the processing resource is to output the first source operand data.