CACHE MONITORING
    1.
    发明公开
    CACHE MONITORING 审中-公开

    公开(公告)号:EP3588781A1

    公开(公告)日:2020-01-01

    申请号:EP19175814.3

    申请日:2019-05-21

    申请人: INTEL Corporation

    IPC分类号: H03K19/177 G06F3/06

    摘要: There is disclosed in one example a computing apparatus, including: a processor; a multilevel cache including a plurality of cache levels; a peripheral device configured to write data directly to a directly writable cache; and a cache monitoring circuit, including cache counters La to be incremented when a cache line is allocated into the directly writable cache, Lp to be incremented when a cache line is processed by the processor and deallocated from the directly writable cache, and Le to be incremented when a cache line is evicted from the directly writable cache to the memory, wherein the cache monitoring circuit is to determine a direct write policy according to the cache counters.