MEMORY ACCESS CONTROL
    1.
    发明公开

    公开(公告)号:EP3332331A1

    公开(公告)日:2018-06-13

    申请号:EP16833476.1

    申请日:2016-07-05

    申请人: Intel Corporation

    IPC分类号: G06F13/16 G06F3/06

    摘要: The present disclosure relates to memory array access control. An apparatus includes partition control circuitry to control at least one partition of a memory array, the at least one partition control circuitry also to receive a controlled clock signal to enable execution of a legitimate memory access command and to generate an active/idle signal having an active state when executing the legitimate memory access command and an idle state when executing the legitimate memory access command is complete; wherein the clock signal is disabled when the active/idle signal is in an idle state.

    MEMORY ACCESS CONTROL
    3.
    发明公开

    公开(公告)号:EP3825860A1

    公开(公告)日:2021-05-26

    申请号:EP20193446.0

    申请日:2016-07-05

    申请人: INTEL Corporation

    IPC分类号: G06F13/16 G06F3/06 G06F1/3234

    摘要: The present disclosure relates to memory array access control. An apparatus includes partition control circuitry to control at least one partition of a memory array, the at least one partition control circuitry also to receive a controlled clock signal to enable execution of a legitimate memory access command and to generate an active/idle signal having an active state when executing the legitimate memory access command and an idle state when executing the legitimate memory access command is complete; wherein the clock signal is disabled when the active/idle signal is in an idle state.