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公开(公告)号:EP3332331A1
公开(公告)日:2018-06-13
申请号:EP16833476.1
申请日:2016-07-05
申请人: Intel Corporation
CPC分类号: G06F3/0644 , G06F3/0619 , G06F3/0634 , G06F3/0679 , G06F3/0688 , G11C5/14 , G11C7/1063 , G11C7/222
摘要: The present disclosure relates to memory array access control. An apparatus includes partition control circuitry to control at least one partition of a memory array, the at least one partition control circuitry also to receive a controlled clock signal to enable execution of a legitimate memory access command and to generate an active/idle signal having an active state when executing the legitimate memory access command and an idle state when executing the legitimate memory access command is complete; wherein the clock signal is disabled when the active/idle signal is in an idle state.
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公开(公告)号:EP3903190A1
公开(公告)日:2021-11-03
申请号:EP19906193.8
申请日:2019-11-19
申请人: INTEL Corporation
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公开(公告)号:EP3825860A1
公开(公告)日:2021-05-26
申请号:EP20193446.0
申请日:2016-07-05
申请人: INTEL Corporation
IPC分类号: G06F13/16 , G06F3/06 , G06F1/3234
摘要: The present disclosure relates to memory array access control. An apparatus includes partition control circuitry to control at least one partition of a memory array, the at least one partition control circuitry also to receive a controlled clock signal to enable execution of a legitimate memory access command and to generate an active/idle signal having an active state when executing the legitimate memory access command and an idle state when executing the legitimate memory access command is complete; wherein the clock signal is disabled when the active/idle signal is in an idle state.
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