利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

6 条记录 (耗时 0.013 秒)

    MULTIPLE LOW-SPEED INTO SINGLE HIGH-SPEED SDH/SONET CHANNEL MAPPER / FRAMER DEVICE AND METHOD
    1.
    发明公开
    MULTIPLE LOW-SPEED INTO SINGLE HIGH-SPEED SDH/SONET CHANNEL MAPPER / FRAMER DEVICE AND METHOD 有权
    分析方法与VORICHTUNGEINFÜNGER/成帧器多通道低的速度在一个单一的高速SDH / SONET通道

    公开(公告)号：EP1396105A2

    公开(公告)日：2004-03-10

    申请号：EP02735164.2

    申请日：2002-03-22

    申请人： International Business Machines Corporation ,  IBM DEUTSCHLAND GMBH

    发明人： CLAUBERG, Rolf

    IPC分类号： H04J3/16

    CPC分类号： H04J3/1611 ,  H04J3/0691 ,  H04J2203/0089

    摘要： According to the present invention a method and a device is provided for combining at least two data signals having a first data rate into a single data stream having a second data rate being higher than the first data rate for transmission on a shared medium or vice versa, said device comprises at least one port for receiving said at least two data signals and a port addressing unit for extracting data from the data signals received by said ports, wherein said port addressing unit is configured to place the extracted data at predetermined positions in said single data stream to be transmitted on said shared medium and at least one control data insertion unit is provided for placing control data in said single data stream. Thus, a method and device proposed implementing a multiplexing structure in which the data from M parallel low-speed channels are multiplexed onto a data bus operating with M times the data rate of the M low-speed channels. A multiple-stage process where, e.g., 28 T-1 (DS-1) channels are re-mapped into one T-3 (DS-3) channel and 3 T-3 (DS-3) channels are then mapped into an STM-1 frame is advantageously avoided.

    PARALLEL ON-THE-FLY PROCESSING OF FIXED LENGTH CELLS
    2.
    发明授权
    PARALLEL ON-THE-FLY PROCESSING OF FIXED LENGTH CELLS 失效
    并行处理即时CELL固定长度

    公开(公告)号：EP0879544B1

    公开(公告)日：2003-05-02

    申请号：EP96900682.4

    申请日：1996-02-06

    申请人： International Business Machines Corporation

    发明人： CLAUBERG, Rolf

    IPC分类号： H04Q11/04 ,  H04L12/56

    CPC分类号： H04L49/3081 ,  H04L49/30 ,  H04L49/3009 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04Q11/0478

    摘要： Disclosed is an apparatus (9) for processing a sequential stream (10) of fixed length cells, received via a slotted transmission medium (11). This apparatus comprises a demultiplexer (12) employed to provide N sub-streams of fixed length cells out of the sequential stream (10) of fixed length cells. It further comprises N (with N = 2, 3, ...) identical, parallel processing paths (13.x) connected to said demultiplexer (12) such that each of said N sub-streams is fed into another one of said N processing paths (13.x); and the feeling into said processing paths (13.x) taking place in a chronological, staggered manner, the period between a sub-stream being fed into a particular processing path and the next sub-stream being fed into another processing path being identical to the slot duration (T) of the slotted transmission medium (11). The apparatus further comprises a multiplexer (17) for multiplexing sub-streams provided at the output of said N processing paths (13.x) into an output stream (18) of fixed length cells maintaining the sequential cell order of the sequential stream (10) of fixed length cells.

    PARALLEL ON-THE-FLY PROCESSING OF FIXED LENGTH CELLS
    6.
    发明公开
    PARALLEL ON-THE-FLY PROCESSING OF FIXED LENGTH CELLS 失效
    并行处理即时CELL固定长度

    公开(公告)号：EP0879544A1

    公开(公告)日：1998-11-25

    申请号：EP96900682.0

    申请日：1996-02-06

    申请人： International Business Machines Corporation

    发明人： CLAUBERG, Rolf

    IPC分类号： H04Q3 ,  H04L12 ,  H04Q11

    CPC分类号： H04L49/3081 ,  H04L49/30 ,  H04L49/3009 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04Q11/0478

    摘要： Disclosed is an apparatus (9) for processing a sequential stream (10) of fixed length cells, received via a slotted transmission medium (11). This apparatus comprises a demultiplexer (12) employed to provide N sub-streams of fixed length cells out of the sequential stream (10) of fixed length cells. It further comprises N (with N = 2, 3, ...) identical, parallel processing paths (13.x) connected to said demultiplexer (12) such that each of said N sub-streams is fed into another one of said N processing paths (13.x); and the feeling into said processing paths (13.x) taking place in a chronological, staggered manner, the period between a sub-stream being fed into a particular processing path and the next sub-stream being fed into another processing path being identical to the slot duration (T) of the slotted transmission medium (11). The apparatus further comprises a multiplexer (17) for multiplexing sub-streams provided at the output of said N processing paths (13.x) into an output stream (18) of fixed length cells maintaining the sequential cell order of the sequential stream (10) of fixed length cells.