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公开(公告)号：EP3276818A1
公开(公告)日：2018-01-31
申请号：EP17182760.3
申请日：2017-07-24
IPC分类号： H02P25/098 , H02M7/5395
CPC分类号： H02P25/092 , H02M7/5395 , H02P25/098 , H02P27/04 , H02P2209/09
摘要： A motor control device including a PWM generator generating a PWM generator generating a PWM signal to be outputted to a drive circuit that energizes a winding of a switched reluctance motor; a rectangular wave generator outputting a rectangular wave signal of 1 pulse or more to the drive circuit in 1 drive period of each phase based on a rotational position of the motor; and a drive signal switcher executing switching so that a PWM drive by the PWM signal is performed when a rotational speed of the motor is equal to or less than a threshold value and a rectangular wave drive by the rectangular wave signal is performed when the rotational speed of the motor is greater than the threshold value. The PWM generator synchronizes a timing to start generation of a carrier of the PWM signal with rising of the rectangular wave signal.
摘要翻译： 1。一种电动机控制装置，其特征在于，包括：PWM发生器，生成PWM发生器，生成PWM信号并输出到对开关磁阻电机的绕组通电的驱动电路; 矩形波发生器，基于马达的旋转位置，在每个相的1个驱动周期中向驱动电路输出1个脉冲或更多的矩形波信号; 以及驱动信号切换器，其执行切换，使得当电动机的旋转速度等于或小于阈值时执行通过PWM信号的PWM驱动，并且当旋转速度等于或小于阈值时执行矩形波信号的矩形波驱动 的电机值大于阈值。 PWM发生器使开始产生PWM信号的载波的定时与矩形波信号的上升同步。
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公开(公告)号：EP0457115B1
公开(公告)日：1996-08-14
申请号：EP91107127.2
申请日：1991-05-02
发明人： Shinohara, Makoto
CPC分类号： G06F11/2221 , G06F11/2236
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3.发明公开
公开(公告)号：EP0457115A2
公开(公告)日：1991-11-21
申请号：EP91107127.2
申请日：1991-05-02
发明人： Shinohara, Makoto
CPC分类号： G06F11/2221 , G06F11/2236
摘要： Disclosed is a data processing device (11) with a test control circuit comprising a CPU (2), peripheral devices (3) such as a ROM, a RAM, and the like, an address bus (12) through which the CPU (2) is connected to the peripheral devices (3), an input/output circuit (4) as a interface circuit for controlling transfer of data input/output and an address signal between the address bus (12) and the data bus (13) and an external device (10), and a control circuit (14) incorporated in the data processing device (11) for isolating the address bus (12) and the data bus (13) from the CPU (2) in a test mode of the device and for controlling the input/output operations for the peripheral devices (3), the operation of the input/output control circuit (4), and the operation of the CPU (2).
摘要翻译： 公开了一种具有测试控制电路的数据处理设备（11），其包括CPU（2），诸如ROM，RAM等的外围设备（3），地址总线（12），CPU（2） ）连接到外围设备（3），输入/输出电路（4）作为用于控制数据输入/输出的传送和地址总线（12）与数据总线（13）之间的地址信号的接口电路，以及 一个外部设备（10）和一个控制电路（14），该控制电路（14）包含在数据处理设备（11）中，用于在测试模式下将地址总线（12）和数据总线（13）与CPU 用于控制外围设备（3）的输入/输出操作，输入/输出控制电路（4）的操作和CPU（2）的操作。
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公开(公告)号：EP0457115A3
公开(公告)日：1992-11-04
申请号：EP91107127.2
申请日：1991-05-02
发明人： Shinohara, Makoto
CPC分类号： G06F11/2221 , G06F11/2236
摘要： Disclosed is a data processing device (11) with a test control circuit comprising a CPU (2), peripheral devices (3) such as a ROM, a RAM, and the like, an address bus (12) through which the CPU (2) is connected to the peripheral devices (3), an input/output circuit (4) as a interface circuit for controlling transfer of data input/output and an address signal between the address bus (12) and the data bus (13) and an external device (10), and a control circuit (14) incorporated in the data processing device (11) for isolating the address bus (12) and the data bus (13) from the CPU (2) in a test mode of the device and for controlling the input/output operations for the peripheral devices (3), the operation of the input/output control circuit (4), and the operation of the CPU (2).
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