摘要:
The present invention relates to a method for fabrication of in-laid metal inter onnects. The method comprises the steps of providing a substrate with a dielectr c material(l) on top thereof, depositing a protection layer(2) on top of the die ectric material, depositing a sacrificial layer (7) on top of the protection laye , the sacrificial layer having a mechanical strength that is lower than the mech nical strength of the protection layer, making an opening(3) through the sacrifi ial layer, through the protection layer and into the dielectric material, deposi ing a barrier layer (4)in the opening and on the sacrificial layer, depositing m tal material (5) on the barrier layer, the metal material filling the opening, re oving portions of the metal material existing beyond the opening by means of pol shing, and removing the barrier layer and the sacrificial layer in one polishing step.
摘要:
The method of manufacturing an integrated circuit (IC) according to the invention starts with providing a pre-fabricated integrated circuit (10) comprising an electrical device (2) and having a surface (11) coated with a dielectric material (12) and a metal (15). The dielectric material (12), which may be separated from the metal (15) by the barrier layer (14), has an opening (13), which is filled with the metal (15). Portions of the metal (15) outside the opening (13) are removed by polishing for a first period of time, after which an etching agent (25) is added to the polishing liquid (24) and polishing is continued for a second period of time for removing portions of the metal (15) remaining outside the opening (13). The polishing apparatus (40) is able to perform the method.
摘要:
A method to produce air gaps between metal lines (8(i)( and within dielectrics. The method consists of obtaining a dual damascene structure, applying a diffusion barrier layer (10) directly on the planarized surface and performing a lithography step, thus shielding the metal lines underneath the diffusion barrier layer. Optionally, some portions of large dielectric areas (6) between the metal lines (8(i)) are also shielded. The exposed diffusion barrier layer portions and underlying dielectric are etched. A layer of a material that can be decomposed in volatile components by heating to a temperature of typically between 150-450°C is applied and planarized by etching or CMP. A dielectric layer (20) that is permeable to the decomposition products is deposited and subsequently the substrate is heated. Then, the disposable layer decomposes and disappears through the permeable dielectric layer, leaving air gaps (22) behind in between the metal lines (8(i)) and the large dielectric areas.