Abstract:
In a homodyne-receiver radar system used for ranging and/or target detection, the frequency-modulated (FM) transmit phase are removed from the received signal. Removal of the known FM transmit phase from the received signal reduces the bandwidth of the received signal to half that of a system that does not remove the transmit phase. This allows the sampling rate, and thus the processor throughput, to be cut in half. With the FM transmit phase removed, the phase sequence of the processed signal is akin to a delayed version of the transmit signal phase history. This allows the range processing to use segments of a single phase sequence for processing all range gates, resulting in a large reduction in the amount of coefficient storage used for the matched-phase sequences required to process the set of range gates.
Abstract:
Dual path detection processing in which a low SNR signal processor (520) detects signals over a limited range of low acceleration values and a high SNR signal processor (540) detects signals over a wider range of acceleration values. The low SNR signal processor (520) uses acceleration bins formed from a noncoherent FFT array to detect low SNR signals of far away objects which tend to have lower angular acceleration. Because close proximity target objects tend to have higher SNR return signals, it is not necessary to rely on acceleration bins formed from an FFT array for signal detection. Close proximity targets with high SNR can often be detected in individual coherently integrated FFT templates, despite the likelihood of large acceleration uncertainty from higher angular acceleration rates. Since signal detection of higher SNR signals is much less computationally burdensome than signal detection using a noncoherent FFT array, the present invention is able to realize computational efficiencies by using dual path detection processing.
Abstract:
Signals are transmitted from the transmitter (410) using the antenna (420) that is shared with the receiver (430). Return reflected signals are passed from the receiver (430) to a low pass filter (440) and an analogue to digital converter (450). The digital output of the analogue to digital converter (450) is transformed into the frequency domain by the coherent integrator (460) to form FFT templates of the return signals. Signal manipulation and computation signals can be stored in and retrieved from the memory (470). The signal processor (500) discards signal phase, performs presums, forms an FFT matrix of the FFT templates, and analyzes acceleration bins to detect a target object.