Method for metal delay testing in semiconductor devices
    1.
    发明公开
    Method for metal delay testing in semiconductor devices 失效
    在Halbleiteranordnungen的Verfahren zur Metall-Verzögerungsprüfung

    公开(公告)号:EP0802484A1

    公开(公告)日:1997-10-22

    申请号:EP97103115.8

    申请日:1997-02-26

    发明人: Sporck, Nicholas

    IPC分类号: G06F11/24 G01R31/3185

    CPC分类号: G01R31/3016 G01R31/31858

    摘要: A semiconductor device is provided having a circuit for measuring a propagation delay related to metal layers formed on the device. In one embodiment, the circuit includes a first bond pad connected to an input of a first signal path, the first signal path including a first plurality of serially connected logic gates wherein the connection between each logic gate of the first plurality is formed on a first metal layer and a second bond pad connected to an output of a second signal path, the second signal path including a second plurality of serially connected logic gates wherein the connection between each logic gate of the second plurality is formed on a second metal layer, the second signal path being in electrical communication with the first signal path.

    摘要翻译: 提供一种半导体器件,其具有用于测量与在器件上形成的金属层相关的传播延迟的电路。 在一个实施例中,电路包括连接到第一信号路径的输入的第一接合焊盘,第一信号路径包括第一多个串联连接的逻辑门,其中第一多个逻辑门之间的连接形成在第一 金属层和连接到第二信号路径的输出的第二接合焊盘,所述第二信号路径包括第二多个串联连接的逻辑门,其中第二多个的每个逻辑门之间的连接形成在第二金属层上, 第二信号路径与第一信号路径电通信。