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公开(公告)号：EP4398309A1
公开(公告)日：2024-07-10
申请号：EP23220797.7
申请日：2023-12-29
发明人： ZHOU, Jifeng , ZHANG, Glenda , HE, Lei
IPC分类号： H01L29/06 , H01L29/08 , H01L29/747 , H01L29/423
CPC分类号： H01L29/747 , H01L29/0661 , H01L29/083 , H01L29/0696 , H01L29/42308
摘要： A TRIAC semiconductor includes an N- region (310), multiple N+ regions (314a-e), and a trench (326). The N- region (310) is sandwiched between two P regions (308, 312). The first P region (308) is connected to an MT2 terminal and the second P region (312) is connected to two MT1 terminals. The multiple N+ regions are located within the first P region (312). The trench (326) is located between two gate terminals (G).
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公开(公告)号：EP4345888A1
公开(公告)日：2024-04-03
申请号：EP23198050.9
申请日：2023-09-18
发明人： ZHANG, Lucas , GAO, Chao , HE, Lei
IPC分类号： H01L23/433 , H01L23/373 , H01L23/495
摘要： A discrete semiconductor packaging structure and associated methods thereof. The structure includes a housing, a chip assembly pad being encapsulated by the housing, where the chip assembly pad is configured for coupling to a semiconductor chip. The structure further includes one or more leads, at least partially encapsulated by the housing, a clip including one or more terminals and a chip linker, where the terminals being configured for coupling to one or more leads, and a heat dissipation block, where the chip linker being coupled between the semiconductor chip and the heat dissipation block. The heat dissipation block is configured for removing heat from the semiconductor chip during operation.
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