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公开(公告)号：EP0938776A1
公开(公告)日：1999-09-01
申请号：EP97948578.0
申请日：1997-11-13
IPC分类号： H03F3
CPC分类号： H03F3/3066
摘要： An amplifier circuit (300) that offers high bandwith operation and a high slew rate is disclosed. The amplifier circuit may also have an input voltage swing down to the negative rail which is particularly suitable for low voltage applications having a single power source. In one embodiment, the amplfiier circuit amplifies a difference voltage between first and second input voltages (V1, V2) to produce and output voltage, and includes: an analog voltage-to-current converter (302) for receiving the first and second input voltages (V1, V2) and producing complementary current signals; and a complementary mirror output stage (304) coupled to receive the complementary current signals at respective mirror circuits. Each of the respective mirror circuits includes a pair of base-coupled transistors having their emitters respectively connected to supply potentials through resistors, and the complementary current signals from the analog voltage-to-current converter (302) are respectively connected to at least one of the emitters of the base-coupled transistors for the respective mirror circuits.
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公开(公告)号：EP0927453A1
公开(公告)日：1999-07-07
申请号：EP97928928.0
申请日：1997-06-10
发明人： KOLLURI, Madhav, V.
CPC分类号： H03F3/72 , H03F3/3076
摘要： Three state high speed amplifiers having a high output impedance when disabled and a minimum glitch when enabled and disabled. The amplifiers utilize complementary emitter followers (Q1, Q2) for the output stage. When the amplifiers are disabled, circuitry (VOUT+V1, VOUT-V1) provides for the purpose is responsive to the voltage on the output of the amplifier to maintain the base-emitter voltages of the output emitter followers (Q1, Q2) at a substantially constant level below the turn-on voltages of the transistors, such as substantially zero volts. When the amplifier is enabled, the circuitry (VOUT+V1, VOUT-V1) is also responsive to the voltage on the output of the amplifier, but this time to allow the base-emitter voltages of the output emitter followers (Q1, Q2) to at least rise to the turn-on voltages of the transistors. Thus the reverse base emitter voltage of the output transistors (Q1, Q2) when the circuit is disabled is limited, and the output glitch on enable and disable is minimal because of the limited base-emitter voltage swing of the output transistors (Q1, Q2) between disable and enable.
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公开(公告)号：EP0856167B1
公开(公告)日：2001-05-02
申请号：EP96922602.6
申请日：1996-06-28
发明人： KOLLURI, Madhav, V.
IPC分类号： G05F1/00 , G05F1/70 , G05F3/00 , G05F5/00 , H03J3/08 , H03F3/45 , H03F3/04 , H03K5/153 , H03K5/08
CPC分类号： H03F3/3066 , G05F3/265 , H03K5/2418
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公开(公告)号：EP0856167A1
公开(公告)日：1998-08-05
申请号：EP96922602.0
申请日：1996-06-28
发明人： KOLLURI, Madhav, V.
CPC分类号： H03F3/3066 , G05F3/265 , H03K5/2418
摘要： A multi-stage current feedback amplifier having a first stage and a second stage. The multi-stage amplifier comprises a transistor device (Q4') having a base, an emitter, and a collector, as well as a replicating device (Q5') having a base, an emitter, and a collector. The base of the replicating device (Q5') is coupled to the base of the transistor device, wherein a voltage in the emitter of the transistor device (Q4') is substantially replicated in the emitter of the replicating device (Q5'). Further, the inventive multi-stage feedback amplifier comprises a current mirror circuit (Q7' and Q8') having a current mirror circuit input and a current mirror circuit output, which current mirror circuit (Q7' and Q8') input is coupled to the collector of the replicating device (Q5'). The current mirror circuit output is coupled to the collector of the transistor device (Q4').
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公开(公告)号：EP1050101A2
公开(公告)日：2000-11-08
申请号：EP98957557.6
申请日：1998-11-03
发明人： KOLLURI, Madhav, V.
IPC分类号： H03F1/00
CPC分类号： H03F3/45291 , H03F3/3023 , H03F2203/45028 , H03F2203/45302
摘要： Operational amplifiers with a gain enhancement apparatus and method result in a substantial improvement in the gain of such amplifiers without change in the gain of the signal amplifying transistors. The gain enhancement is achieved by providing a circuit for having one transistor in the folded cascode stage of the amplifier substantially track the operating conditions of another transistor in the folded cascode stage, thereby substantially eliminating the unbalanced differential drive from the differential input stage that would have been required to accommodate the Early effect in the second stage. This is particularly advantageous when driving MOS output drivers wherein large voltage excursions in the second stage are required, particularly when sinking current from a load.
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