公开(公告)号：EP3214759A1

公开(公告)日：2017-09-06

申请号：EP15854770.3

申请日：2015-10-27

申请人： Huawei Technologies Co. Ltd.

发明人： TANG, Yangyang ,  ZHANG, Chenxiong

IPC分类号： H03F3/45

CPC分类号： H03F1/0205 ,  H03F1/38 ,  H03F3/45183 ,  H03F3/45219 ,  H03F3/45273 ,  H03F2200/135 ,  H03F2200/153 ,  H03F2200/513 ,  H03F2200/87 ,  H03F2203/45028 ,  H03F2203/45036 ,  H03F2203/45051 ,  H03F2203/45054 ,  H03F2203/45114 ,  H03F2203/45124 ,  H03F2203/45134 ,  H03F2203/45221 ,  H03F2203/45281 ,  H03F2203/45288 ,  H03F2203/45342

摘要： A differential input amplification-stage circuit (100) includes a voltage unit (10), first and second bulk-driven transistors (20, 30), first and second mirror current sources (40, 50), and a differential amplifier unit (60). The voltage unit (10) includes first to third voltage output ends (11, 12, 13). The first voltage output end (11) is connected to the first and the second bulk-driven transistors (20, 30); the first and the second bulk-driven transistors (20, 30) respectively receive first and second input voltages, and converts the first and the second input voltages into first and second output currents; the differential amplifier unit (60) separately outputs first and second adjustment currents under an action of voltages of the first to the third voltage output ends (11, 12, 13); and the first and the second mirror current sources (40, 50) respectively output first and second predetermined currents (I out+ , I out- ) according to the first output current and the first adjustment current, and the second output current and the second adjustment current, so as to maintain transconductance constancy of the differential input amplification-stage circuit (100). Therefore, output stability is improved. In addition, an output-stage circuit (200) and an ultra-low working voltage rail-to-rail transportation amplified circuit (300) are further provided.

摘要翻译： 本发明的差动输入放大级电路（100）包括电压单元（10），第一和第二体驱动晶体管（20,30），第一和第二镜像电流源（40,50）以及差分放大器单元（60 ）。 电压单元（10）包括第一至第三电压输出端（11,12,13）。 第一电压输出端（11）连接到第一和第二体驱动晶体管（20,30）。 第一和第二体驱动晶体管（20,30）分别接收第一和第二输入电压，并且将第一和第二输入电压转换为第一和第二输出电流; 差分放大器单元（60）在第一至第三电压输出端（11,12,13）的电压的作用下分别输出第一和第二调节电流; 并且第一镜像电流源和第二镜像电流源分别根据第一输出电流和第一调节电流以及第二输出电流和第二调节电流输出第一和第二预定电流Iout +，Iout-， 以保持差分输入放大级电路（100）的跨导恒定性。 因此，输出稳定性得到改善。 此外，还提供输出级电路（200）和超低工作电压轨到轨输送放大电路（300）。

公开(公告)号：EP2057735A1

公开(公告)日：2009-05-13

申请号：EP06796270.4

申请日：2006-08-28

申请人： STMicroelectronics S.r.l.

发明人： ZAMPROGNO, Marco ,  CONFALONIERI, Pierangelo ,  MINUTI, Alberto

IPC分类号： H03F3/00 ,  H03F3/45

CPC分类号： H03F3/005 ,  H03F3/45192 ,  H03F2203/45028 ,  H03F2203/45138 ,  H03F2203/45396 ,  H03F2203/45534 ,  H03F2203/45726

摘要： An electrical circuit (1) for conversion from differential to single-ended is described, comprising: a differential amplifier stage (2) having a first (IN+) and a second (IN') input; a first (5) and a different second charging circuit (6) of the differential stage that can be operatively coupled, respectively, with an output (OUT*) of the conversion circuit (1) and with an auxiliary output (AUXOUT*). The circuit also comprises a first (7) and a second (8) buffer circuit each functionally arranged between one of said outputs\and between one of said charging circuits. The buffer circuits being configured so as to minimise a difference between the relative impedances seen towards said outputs (OUT*, AUXOUT*).

公开(公告)号：EP1510000B1

公开(公告)日：2006-01-25

申请号：EP03760203.4

申请日：2003-04-16

申请人： Analog Devices, Inc.

发明人： HUANG, Yuhong

IPC分类号： H03F1/02 ,  H03F3/45

CPC分类号： H03F3/45766 ,  H03F3/45417 ,  H03F2203/45028 ,  H03F2203/45048 ,  H03F2203/45308 ,  H03F2203/45466

摘要： An operational amplifier provides independent trimming of Vos for both high and low common mode input voltages. The amplifier includes complementary input pairs (MP1/MP2, MN1/MN2), and employs a steering circuit (24) which provides a tail current Itail to one pair when Vcm is less than a threshold voltage Vth, and provides Itail to the other pair when Vcm > Vth. The input pairs drive a load stage (14) which includes one or more trim inputs (TRIM1, TRIM2) that enable Vos to be varied with one or more trim signals applied to the trim inputs. A first trim signal generating circuit (26) provides a first trim signal (DeltaI1) only when Vcm Vth. This allows the input offset voltages at high and low Vcm to be adjusted independently.

公开(公告)号：EP1405400B1

公开(公告)日：2005-05-04

申请号：EP02752988.2

申请日：2002-07-02

申请人： Infineon Technologies AG

发明人： KLEIN, Peter ,  LUSTIG, Bernhard ,  SEWALD, Dieter

IPC分类号： H03D7/14

CPC分类号： H03F3/45677 ,  H03F2200/372 ,  H03F2203/45028 ,  H03F2203/45298 ,  H03F2203/45418 ,  H03F2203/45424

摘要： The invention relates to an interface circuit for connecting to an output of a frequency converter. Said circuit contains at least two current paths (10, 20), which are intercoupled in a parallel connection and respectively comprise at least one cascode stage (12, 13, 22, 23) for signal processing. Said circuit permits direct current offsets of the frequency converter to be compensated, in addition to a switchable amplification ratio for signals with a wide dynamic range and provides a large signal-to-noise margin. The inventive interface circuit is preferably for use in mobile radio telephone receivers.

公开(公告)号：EP0809354B1

公开(公告)日：2001-10-24

申请号：EP97107962.9

申请日：1997-05-15

申请人： NEC CORPORATION

发明人： Sone, Kazuya

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F3/45094 ,  H03F3/45179 ,  H03F3/45192 ,  H03F3/45291 ,  H03F2203/45028

公开(公告)号：EP1050101A2

公开(公告)日：2000-11-08

申请号：EP98957557.6

申请日：1998-11-03

申请人： MAXIM INTEGRATED PRODUCTS, INC.

发明人： KOLLURI, Madhav, V.

IPC分类号： H03F1/00

CPC分类号： H03F3/45291 ,  H03F3/3023 ,  H03F2203/45028 ,  H03F2203/45302

摘要： Operational amplifiers with a gain enhancement apparatus and method result in a substantial improvement in the gain of such amplifiers without change in the gain of the signal amplifying transistors. The gain enhancement is achieved by providing a circuit for having one transistor in the folded cascode stage of the amplifier substantially track the operating conditions of another transistor in the folded cascode stage, thereby substantially eliminating the unbalanced differential drive from the differential input stage that would have been required to accommodate the Early effect in the second stage. This is particularly advantageous when driving MOS output drivers wherein large voltage excursions in the second stage are required, particularly when sinking current from a load.

公开(公告)号：EP0824783A4

公开(公告)日：1999-08-04

申请号：EP95931042

申请日：1995-08-31

申请人： ANALOG DEVICES INC

发明人： BUTLER JAMES R

IPC分类号： H03F3/30 ,  H03F3/45

CPC分类号： H03F3/4521 ,  H03F3/3067 ,  H03F3/45071 ,  H03F3/45121 ,  H03F2200/258 ,  H03F2203/45028 ,  H03F2203/45232 ,  H03F2203/45244 ,  H03F2203/45281 ,  H03F2203/45366 ,  H03F2203/45508 ,  H03F2203/45552 ,  H03F2203/45568

摘要： A double-folded cascode operational amplifier capable of operating with rail-to-rail common mode inputs includes two differential transistor pairs (Q1, Q2, Q6, Q7) of opposite conductivity, with an associated current source and input resistor pair for each pair of input transistors. Its gain stage (6) includes two interconnected pairs of folded cascode gain transistors (Q3, Q4, Q12, Q13) that are connected to the two pairs of input resistors so that a change in the differential input signal produces a corresponding change in the gain stage output via the resistors. An output stage (8) includes transistor-resistor circuitry to bias a pair of output transistors (Q20, Q21) in opposite directions and produce a net amplifier output at their junction. The gain transistor voltages are balanced by a voltage shifting circuit to inhibit input voltage offsets.

摘要翻译： 能够在轨到轨共模输入下工作的双重折叠共源共栅运算放大器包括两个导电率相反的差分晶体管对（Q1，Q2，Q6，Q7），每对具有相关的电流源和输入电阻对 输入晶体管。 其增益级（6）包括连接到两对输入电阻器的两对互连的折叠共源共栅增益晶体管（Q3，Q4，Q12，Q13），使得差分输入信号的变化产生增益的相应变化 通过电阻输出级。 输出级（8）包括晶体管 - 电阻器电路，用于以相反的方向偏置一对输出晶体管（Q20，Q21），并在其结点处产生净放大器输出。 增益晶体管电压由电压转换电路平衡以抑制输入电压偏移。

公开(公告)号：EP0649218B1

公开(公告)日：1999-01-20

申请号：EP94307374.2

申请日：1994-10-07

申请人： Hewlett-Packard Company

发明人： Badyal, Rajeev ,  Shu, Shao F.

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45192 ,  H03F3/45636 ,  H03F3/45659 ,  H03F2203/45028 ,  H03F2203/45122 ,  H03F2203/45174 ,  H03F2203/45184 ,  H03F2203/45462 ,  H03F2203/45641 ,  H03F2203/45651

公开(公告)号：EP0511856A1

公开(公告)日：1992-11-04

申请号：EP92303884.8

申请日：1992-04-30

申请人： WINBOND ELECTRONICS NORTH AMERICA CORPORATION

发明人： Hsu, Wei-Chan ,  Nguyen, Chinh D. ,  Chen, Fred Tun-Jen

IPC分类号： G05F1/575 ,  H03F3/45

CPC分类号： H03F3/45192 ,  G05F1/575 ,  H03F2203/45028 ,  H03F2203/45182 ,  H03F2203/45244 ,  H03F2203/45478

摘要： A reference generator system that operates in either a current-controlled mode or a voltage-controlled mode and includes a power-down circuit connected to the operational amplifier to power down the operational amplifier when the reference generator is switched to the current-controlled mode.

摘要翻译： 一种参考发生器系统，其以电流控制模式或电压控制模式工作，并且包括连接到运算放大器的掉电电路，以在参考发生器切换到电流控制模式时将运算放大器断电。

公开(公告)号：EP0415620A3

公开(公告)日：1991-06-12

申请号：EP90309088.4

申请日：1990-08-20

申请人： DELCO ELECTRONICS CORPORATION

发明人： Kearney, Mark B.

IPC分类号： H03F3/45

CPC分类号： H03F3/45094 ,  H03F2203/45011 ,  H03F2203/45028 ,  H03F2203/45076 ,  H03F2203/45188 ,  H03F2203/45212 ,  H03F2203/45466 ,  H03F2203/45476

摘要： A circuit of the folded cascode type comprises a differential input stage (10), connected to a differential to single-ended output stage (12,16), and a current mirror (Q10,Q11) interconnected with both stages for maintaining a precise relationship between bias currents (I s ,I2) in the two stages.