公开(公告)号：EP3011566A4

公开(公告)日：2016-07-06

申请号：EP14813236

申请日：2014-06-05

申请人： MICRON TECHNOLOGY INC

发明人： CASTRO HERNAN A ,  TEDROW KERRY DEAN ,  WU JACK CHINHO

IPC分类号： G11C7/00 ,  G11C7/10 ,  G11C13/00

CPC分类号： G06F13/1605 ,  G06F3/0604 ,  G06F3/0635 ,  G06F3/0683 ,  G06F12/0653 ,  G06F13/1668 ,  G06F13/4022 ,  G06F2212/1008 ,  G06F2212/1041 ,  G11C5/025 ,  G11C8/10 ,  G11C8/12 ,  G11C13/0023 ,  G11C13/0033 ,  G11C2213/71

摘要： In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.

摘要翻译： 在一个实施例中，公开了诸如存储器件的装置。 该装置包括多个存储器片和选择电路。 每个存储器片具有在多个数字线导体和多个接入线导体的交叉点处的存储部件阵列。 选择电路包括线路驱动器，其基于对应的数字线路导体和对存储组件的对应的接入线路导体选择存储器瓦片的存储部件。 选择电路可以在选择不同存储器块的存储组件之前以连续的方式选择存储器块的两个或更多个存储组件。