Integrated processing for an etch module using a hard mask technique
    1.
    发明公开
    Integrated processing for an etch module using a hard mask technique 失效
    采用硬掩模技术的蚀刻模块的集成处理

    公开(公告)号:EP0855737A2

    公开(公告)日:1998-07-29

    申请号:EP97310627.1

    申请日:1997-12-24

    申请人: MITEL CORPORATION

    IPC分类号: H01L21/033 H01L21/31

    摘要: A method of fabricating a semiconductor device includes etching hcles through at least one deposited layer to an underlying structure. A hard mask is deposited on an upper surface of a device to be etched, the mask is patterned with the aid of a photoresist and holes are etched in the hard mask. After removal of the photoresist, contact or via holes are etched through the patterned hard mask in the deposited layer(s) to reach the underlying structure.

    摘要翻译: 制造半导体器件的方法包括通过至少一个沉积层蚀刻至下面的结构。 将硬掩模沉积在要被蚀刻的器件的上表面上,借助光刻胶对掩模进行图案化,并且在硬掩模中蚀刻出空穴。 去除光刻胶之后,通过沉积层中的图案化硬掩模蚀刻接触孔或通孔以到达下面的结构。

    Integrated processing for an etch module using a hard mask technique
    2.
    发明公开
    Integrated processing for an etch module using a hard mask technique 失效
    Ätzverfahrenmit einer harten Maske

    公开(公告)号:EP0855737A3

    公开(公告)日:1998-12-23

    申请号:EP97310627.1

    申请日:1997-12-24

    申请人: MITEL CORPORATION

    IPC分类号: H01L21/033 H01L21/31

    摘要: A method of fabricating a semiconductor device includes etching hcles through at least one deposited layer to an underlying structure. A hard mask is deposited on an upper surface of a device to be etched, the mask is patterned with the aid of a photoresist and holes are etched in the hard mask. After removal of the photoresist, contact or via holes are etched through the patterned hard mask in the deposited layer(s) to reach the underlying structure.

    摘要翻译: 制造半导体器件的方法包括通过至少一个沉积层将腐蚀孔蚀刻到下面的结构。 硬掩模沉积在要蚀刻的器件的上表面上,借助于光致抗蚀剂对掩模进行图案化,并且在硬掩模中蚀刻孔。 在除去光致抗蚀剂之后,通过沉积层中的图案化硬掩模蚀刻接触孔或通孔,以到达下面的结构。