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公开(公告)号：EP1596514A3
公开(公告)日：2007-08-15
申请号：EP05106705.6
申请日：1999-04-20
发明人： Otaka, Akihiro, c/o NTT Int. Prop. Center , Miki, Noriki, NTT Int. Prop. Center , Tamaki, Norio, c/o NTT Int. Prop. Center
CPC分类号： H04J3/247 , H04J3/24 , H04L12/2801 , H04L47/13 , H04L47/50 , H04L47/522 , H04L47/6225 , H04L47/6235 , H04L47/624 , H04L49/9031
摘要： A packet multiplexing apparatus is presented for multiplexing packets to be transmitted from a number of user facilities to a local service node in such a way to assure equal access to one output port for all the users. The apparatus is provided with input ports (1-0~1-(N-1)) for inputting a packet in a respective input port; buffer memories (3-0~3-(n-1)) provided for each input port for temporary storage of a packet; an output signal transmission circuit (4) for retrieving a packet from each buffer memory in a specific sequence; an output port (2) for transmitting packets output from the output signal transmission circuit; and a retrieval sequencing section (10 or 20 or 30) for controlling the specific sequence by changing a retrieving order of packets from buffer memories for each complete round of packet retrieval so that a frequency of the retrieving order for each input port is uniformly shared by the input ports.
摘要翻译： 提出了一种分组多路复用装置，用于多路复用要从多个用户设施发送到本地服务节点的分组，以确保对于所有用户均等访问一个输出端口。 该设备具有用于在相应输入端口中输入分组的输入端口（1-0〜1-（N-1））; 为每个输入端口提供的用于临时存储分组的缓冲存储器（3-0〜3-（n-1））; 输出信号传输电路（4），用于以特定顺序从每个缓冲存储器中检索分组; 输出端口（2），用于传输从输出信号传输电路输出的分组; 和一个检索序列部分（10或20或30），用于通过改变来自缓冲存储器的包的检索次序来控制特定序列，用于每轮完整的包检索，使得每个输入端口的检索次序的频率被 输入端口。
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公开(公告)号：EP1596514A2
公开(公告)日：2005-11-16
申请号：EP05106705.6
申请日：1999-04-20
发明人： Otaka, Akihiro, c/o NTT Int. Prop. Center , Miki, Noriki, NTT Int. Prop. Center , Tamaki, Norio, c/o NTT Int. Prop. Center
CPC分类号： H04J3/247 , H04J3/24 , H04L12/2801 , H04L47/13 , H04L47/50 , H04L47/522 , H04L47/6225 , H04L47/6235 , H04L47/624 , H04L49/9031
摘要： A packet multiplexing apparatus is presented for multiplexing packets to be transmitted from a number of user facilities to a local service node in such a way to assure equal access to one output port for all the users. The apparatus is provided with input ports (1-0~1-(N-1)) for inputting a packet in a respective input port; buffer memories (3-0~3-(n-1)) provided for each input port for temporary storage of a packet; an output signal transmission circuit (4) for retrieving a packet from each buffer memory in a specific sequence; an output port (2) for transmitting packets output from the output signal transmission circuit; and a retrieval sequencing section (10 or 20 or 30) for controlling the specific sequence by changing a retrieving order of packets from buffer memories for each complete round of packet retrieval so that a frequency of the retrieving order for each input port is uniformly shared by the input ports.
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公开(公告)号：EP1596514B1
公开(公告)日：2010-02-24
申请号：EP05106705.6
申请日：1999-04-20
发明人： Otaka, Akihiro, c/o NTT Int. Prop. Center , Miki, Noriki, NTT Int. Prop. Center , Tamaki, Norio, c/o NTT Int. Prop. Center
CPC分类号： H04J3/247 , H04J3/24 , H04L12/2801 , H04L47/13 , H04L47/50 , H04L47/522 , H04L47/6225 , H04L47/6235 , H04L47/624 , H04L49/9031
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