公开(公告)号：EP0767536A3

公开(公告)日：1998-04-08

申请号：EP96307223.6

申请日：1996-10-02

申请人： NORTHERN TELECOM LIMITED

发明人： Guay, Bernard ,  Altmann, Michael

IPC分类号： H03K5/151

CPC分类号： H03K5/151 ,  H03C1/542 ,  H03H11/1213 ,  H03K5/1532

摘要： A CML/ECL clock phase shifter device provides a 360° phase control range and, upon being provided with two CML clock signals related by a known phase difference, the device produces any desired phase in response to a control signal. The device uses a CMOS current switch which generates current signals having the amplitude adjustable with the control signal, which is a digital word. Differential pairs provide amplitude modulated current signals for the input clock and the variant of the input clock. Two MOS transmission networks selectively invert each amplitude modulated signal and sum the signals from each side on a load network. The phase control resolution is optimal over four quadrants for quadrature input clock signals.

公开(公告)号：EP0767536A2

公开(公告)日：1997-04-09

申请号：EP96307223.6

申请日：1996-10-02

申请人： NORTHERN TELECOM LIMITED

发明人： Guay, Bernard ,  Altmann, Michael

IPC分类号： H03K5/151

CPC分类号： H03K5/151 ,  H03C1/542 ,  H03H11/1213 ,  H03K5/1532

摘要： A CML/ECL clock phase shifter device provides a 360° phase control range and, upon being provided with two CML clock signals related by a known phase difference, the device produces any desired phase in response to a control signal. The device uses a CMOS current switch which generates current signals having the amplitude adjustable with the control signal, which is a digital word. Differential pairs provide amplitude modulated current signals for the input clock and the variant of the input clock. Two MOS transmission networks selectively invert each amplitude modulated signal and sum the signals from each side on a load network. The phase control resolution is optimal over four quadrants for quadrature input clock signals.

摘要翻译： CML / ECL时钟移相器装置提供360°相位控制范围，并且在提供与已知相位差相关的两个CML时钟信号时，该装置响应于控制信号产生任何期望的相位。 该器件使用CMOS电流开关，其产生具有作为数字字的控制信号可调幅度的电流信号。 差分对为输入时钟和输入时钟的变体提供幅度调制电流信号。 两个MOS传输网络选择性地反转每个幅度调制信号，并且对来自负载网络上的每一侧的信号求和。 正交输入时钟信号的四个象限的相位控制分辨率是最佳的。