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公开(公告)号：EP2383913B1
公开(公告)日：2013-10-23
申请号：EP10290226.9
申请日：2010-04-30
Applicant: NXP B.V.
Inventor： Fillatre, Vincent , Tourret, Jean-Robert
CPC classification number: H04B15/04 , H04B1/30 , H04B2215/064
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公开(公告)号：EP2383914A1
公开(公告)日：2011-11-02
申请号：EP10290229.3
申请日：2010-04-30
Applicant: NXP B.V.
Inventor： Tourret, Jean-Robert , Fillatre, Vincent
IPC: H04B15/06
CPC classification number: H04B15/06 , H04B2215/064 , H04B2215/065
Abstract: The disclosure relates to digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit (200) having digital components (209) and analogue components (202, 203, 204), the circuit comprising: a radiofrequency signal receiver comprising a local oscillator signal generator (205) configured to provide a local oscillator signal at a frequency f LO and a mixer (203) configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator (208) configured to generate a digital clock signal at a frequency f DIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.
Abstract translation: 本公开涉及数字杂波减少，其中杂散被保持在选定的感兴趣的频道之外，其中涉及具有数字组件（209）和模拟组件（202,203,204）的集成射频收发器电路（200）的说明性实施例，电路 包括：射频信号接收器，包括被配置为提供频率fLO的本地振荡器信号的本地振荡器信号发生器（205）和被配置为将输入射频信号与所述本地振荡器信号组合以产生中频信号的混频器（203） ; 以及时钟信号发生器（208），被配置为以用于数字分量的操作的频率fDIG产生数字时钟信号，其中产生本地振荡器信号和/或从中导出本地振荡器信号的参考信号，使得数字 马刺处于接收者选择的乐队之外。
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公开(公告)号：EP2383913A1
公开(公告)日：2011-11-02
申请号：EP10290226.9
申请日：2010-04-30
Applicant: NXP B.V.
Inventor： Fillatre, Vincent , Tourret, Jean-Robert
CPC classification number: H04B15/04 , H04B1/30 , H04B2215/064
Abstract: The disclosure relates to digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit (200) having digital components (209) and analogue components (202, 203, 204), the circuit comprising: a radiofrequency signal receiver comprising a local oscillator signal generator (205) configured to provide a local oscillator signal at a frequency f LO and a mixer (203) configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator (208) configured to generate a digital clock signal at a frequency f DIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.
Abstract translation: 本公开涉及其中马刺保持在所选择的感兴趣的信道外的数字支线减少，其中涉及具有数字部件（209）和模拟部件（202,203,204）的集成射频收发器电路（200）的说明性实施例，该电路 包括：射频信号接收机，包括被配置为以频率f LO提供本地振荡器信号的本地振荡器信号发生器（205）和被配置为将输入射频信号与本地振荡器信号组合以产生中频的混频器（203） 信号; 以及时钟信号发生器（208），其被配置为以频率f DIG生成用于数字分量的操作的数字时钟信号，其中产生本地振荡器信号和/或导出本地振荡器信号的参考信号，使得 数字马刺位于由接收器选择的频带之外。
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公开(公告)号：EP2383914B1
公开(公告)日：2015-01-28
申请号：EP10290229.3
申请日：2010-04-30
Applicant: NXP B.V.
Inventor： Tourret, Jean-Robert , Fillatre, Vincent
IPC: H04B15/06
CPC classification number: H04B15/06 , H04B2215/064 , H04B2215/065
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