High resolution overlapping bit segmented dac
    1.
    发明公开
    High resolution overlapping bit segmented dac 审中-公开
    Segmentierter Digital-Analogwandler mithochauflösendemÜberlappungsbit

    公开(公告)号:EP2328274A1

    公开(公告)日:2011-06-01

    申请号:EP10192277.1

    申请日:2010-11-23

    申请人: NXP B.V.

    IPC分类号: H03M1/68 H03M1/06

    摘要: A controller receives an M-bit input and generates, in response, an S-bit upper range binary data feeding S-bit high range DAC and an R-bit lower range data feeding an R-bit low range DAC. The controller detects transition points in the M-bit input and, in response, adds a transition data to the S-bit data equal to at least one least significant bit of the S-bit data and subtracts a value from the R-bit data equal to the transition data. The transition points and the transition data are detected and added at points avoiding such transitions at a full scale value of the R-bit data.

    摘要翻译: 控制器接收M位输入,作为响应,生成S位上限二进制数据馈送S位高范围DAC和馈送R位低范围DAC的R位下限范围数据。 控制器检测M位输入中的转换点,并作为响应,将转移数据添加到等于S位数据的至少一个最低有效位的S位数据,并从R位数据中减去一个值 等于过渡数据。 在R位数据的满量程值处避免这种转变的点处检测和添加转换点和转移数据。