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公开(公告)号：EP2693634A1
公开(公告)日：2014-02-05
申请号：EP13174363.5
申请日：2013-06-28
申请人： NXP B.V.
CPC分类号： H03C5/00 , H03F3/2173 , H03F3/24 , H04L25/0272
摘要： Configurable suppression of harmonics in a radio frequency (RF) transmitter circuit having two class-D switching amplifiers that produce a differential output signal having introduced harmonics is contemplated. A selected harmonic is used to determine a time duration. A harmonic suppression circuit modifies a radio frequency polar modulated data signal that is encoded using an amplitude component and a phase component. The modification is responsive to the determined time duration. The switching power amplifiers amplify the modified polar modulated data signal to produce an amplified signal. The amplified signal includes three signal levels, a high signal level, a middle signal level and a low signal level. The timing of transitions between the high and low signal levels represents the phase component, and the transitions include the middle signal level for the time duration, thereby suppressing the selected harmonic.
摘要翻译： 预期具有两个产生具有引入的谐波的差分输出信号的D类开关放大器的射频（RF）发射机电路中的谐波的可配置抑制。 选择的谐波用于确定持续时间。 谐波抑制电路修改使用振幅分量和相位分量编码的射频极调制数据信号。 修改响应于确定的持续时间。 开关功率放大器放大经修改的极坐标数据信号以产生放大信号。 放大的信号包括三个信号电平，高信号电平，中间信号电平和低信号电平。 高信号电平和低信号电平之间的转换时序表示相位分量，并且转换包括持续时间的中间信号电平，由此抑制所选择的谐波。
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公开(公告)号：EP2693634B1
公开(公告)日：2015-08-12
申请号：EP13174363.5
申请日：2013-06-28
申请人： NXP B.V.
CPC分类号： H03C5/00 , H03F3/2173 , H03F3/24 , H04L25/0272
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