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    Method for correcting errors in parallel A/D conversion, corrector and parallel A/D converter
    2.
    发明公开
    Method for correcting errors in parallel A/D conversion, corrector and parallel A/D converter 审中-公开
    在平行A / D转换为纠错的方法，Korrektionsgerät和平行A / D转换器

    公开(公告)号：EP0957585A3

    公开(公告)日：2003-01-08

    申请号：EP99660077.1

    申请日：1999-05-12

    申请人： Nokia Corporation

    发明人： Kananen, Asko ,  Paasio, Ari ,  Lindfors, Saska ,  Halonen, Kari

    IPC分类号： H03M1/06

    CPC分类号： H03M1/0809 ,  H03M1/365

    摘要： The invention pertains to a method and corrector (IC6) for correcting an error in a parallel analog-to-digital conversion. Such a correctable error is caused by uncertainties in the reading of the states of parallel comparing elements (IC1, IC2, IC3, IC4) in the converter, said uncertainties being brought about by nonideality, such as non-simultaneous state latching. This error is corrected using a nonlinear cellular neural network preferably such that the real level of the phenomenon compared by means of the comparing elements (IC1, IC2, IC3, IC4) is estimated by estimating the states corresponding to correct reading of the comparing elements (IC1, IC2, IC3, IC4) read temporally or otherwise erroneously.

    Integrated circuit containing a delta-sigma modulator with two-step quantization
    3.
    发明公开
    Integrated circuit containing a delta-sigma modulator with two-step quantization 有权
    Integrierter Schaltkreis mit Delta-Sigma Modulator mit Zweistufenquantisierung

    公开(公告)号：EP1681769A1

    公开(公告)日：2006-07-19

    申请号：EP06112900.3

    申请日：2000-09-01

    申请人： Nokia Corporation

    发明人： Lindfors, Saska ,  Halonen, Kari

    IPC分类号： H03M3/04 ,  H03M1/14

    CPC分类号： H03M3/46 ,  H03M1/167 ,  H03M3/424

    摘要： A delta-sigma modulator for converting an analog input signal into a digital output signal comprises a modulator input (501) and a first analog to digital converter (504) coupled to the modulator input (501). The first analog to digital converter has a first analog input and a first digital output. The delta-sigma modulator further comprises an error quantization unit (505, 506, 507) coupled to the first digital output for determining the quantization error caused by the first analog to digital converter (504). Additionally it comprises first signal combining means (508, 708, 802) for combining the outputs of the first analog to digital converter and said error quantization unit to form the digital output signal.

    摘要翻译： 用于将模拟输入信号转换为数字输出信号的Δ-Σ调制器包括耦合到调制器输入（501）的调制器输入（501）和第一模数转换器（504）。 第一模数转换器具有第一模拟输入和第一数字输出。 Δ-Σ调制器还包括耦合到第一数字输出的误差量化单元（505,506,507），用于确定由第一模数转换器（504）引起的量化误差。 另外，它包括用于组合第一模数转换器和所述误差量化单元的输出以形成数字输出信号的第一信号组合装置（508,708,802）。