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1.
公开(公告)号:EP0662663A2
公开(公告)日:1995-07-12
申请号:EP95100064.5
申请日:1995-01-03
发明人: Tanaka, Yasuhiro, c/o Oki Electr.Industry Co., Ltd , Tanabe, Tetsuya, c/o Oki Electr.Industry Co., Ltd. , Tanoi, Satoru, c/o Oki Electric Industry Co., Ltd.
CPC分类号: G11C7/106 , G06F12/0893 , G11C7/1006 , G11C7/1051 , G11C7/1078 , G11C11/4096 , G11C15/04 , G11C15/043 , G11C2207/2245
摘要: A semiconductor memory device has memory cells for storing data, sense amplifiers for amplifying the stored data, and cache cells in which the amplified data can be placed for quick recall. The cache cells can continue to hold data during memory-cell refresh cycles, permitting the cached data to be accessed quickly afterward. The cache cells may be coupled to column data lines that can be disconnected from the sense amplifiers, enabling memory cells to be refreshed while cache access is in progress. Write buffers may be provided so that when cache data are replaced, the old cache data can be copied back to the memory cells while the new cache data are being accessed.
摘要翻译: 半导体存储器件具有用于存储数据的存储单元,用于放大所存储的数据的读出放大器,以及可放置放大数据以用于快速调用的高速缓存单元。 高速缓存单元可以在存储单元刷新周期期间继续保持数据,从而允许快速访问缓存的数据。 高速缓存单元可以耦合到可以从读出放大器断开的列数据线,使得能够刷新存储器单元,同时缓存访问正在进行。 可以提供写入缓冲器,使得当缓存数据被替换时,旧的缓存数据可以被复制回存储器单元,同时正在访问新的高速缓存数据。
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公开(公告)号:EP0662663B1
公开(公告)日:2001-04-04
申请号:EP95100064.5
申请日:1995-01-03
发明人: Tanaka, Yasuhiro, c/o Oki Electr.Industry Co., Ltd , Tanabe, Tetsuya, c/o Oki Electr.Industry Co., Ltd. , Tanoi, Satoru, c/o Oki Electric Industry Co., Ltd.
CPC分类号: G11C7/106 , G06F12/0893 , G11C7/1006 , G11C7/1051 , G11C7/1078 , G11C11/4096 , G11C15/04 , G11C15/043 , G11C2207/2245
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公开(公告)号:EP0662663A3
公开(公告)日:1996-02-07
申请号:EP95100064.5
申请日:1995-01-03
发明人: Tanaka, Yasuhiro, c/o Oki Electr.Industry Co., Ltd , Tanabe, Tetsuya, c/o Oki Electr.Industry Co., Ltd. , Tanoi, Satoru, c/o Oki Electric Industry Co., Ltd.
CPC分类号: G11C7/106 , G06F12/0893 , G11C7/1006 , G11C7/1051 , G11C7/1078 , G11C11/4096 , G11C15/04 , G11C15/043 , G11C2207/2245
摘要: A semiconductor memory device has memory cells for storing data, sense amplifiers for amplifying the stored data, and cache cells in which the amplified data can be placed for quick recall. The cache cells can continue to hold data during memory-cell refresh cycles, permitting the cached data to be accessed quickly afterward. The cache cells may be coupled to column data lines that can be disconnected from the sense amplifiers, enabling memory cells to be refreshed while cache access is in progress. Write buffers may be provided so that when cache data are replaced, the old cache data can be copied back to the memory cells while the new cache data are being accessed.
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