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公开(公告)号：EP0652638A1
公开(公告)日：1995-05-10
申请号：EP94307468.2
申请日：1994-10-12
摘要： In a D.C. restoration circuit for a digital FM radio receiver, in which demodulated signals may be presented at the output of the demodulator as low-level differential signals superimposed on a variable D.C. level, the differential signal paths are capacitively coupled to the inputs of a comparator, and the voltage excursions at these inputs are clamped when the voltage between the inputs exceeds a predetermined value.
摘要翻译： 在用于数字FM无线电接收机的DC恢复电路中，解调信号可以作为叠加在可变DC电平上的低电平差分信号在解调器的输出处呈现，差分信号路径电容耦合到 比较器，并且当输入之间的电压超过预定值时，这些输入端的电压偏移被钳位。
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公开(公告)号：EP0803984A2
公开(公告)日：1997-10-29
申请号：EP97301552.2
申请日：1997-03-06
CPC分类号： H03L7/0895 , H03L7/0891 , H03L7/0896 , H04B1/40
摘要： Amplifier means 5a, 5b e.g. an operational amplifier, for a phase-locked loop employing charge pump 7 for synthesizing RF channels permits a low supply voltage to be used by splitting the amplifier into two stages 5a, 5b. The output at 5a may be a high impedance common emitter pair of complementary transistors allowing a wide voltage swing and part 5b may be an operational amplifier with resistive feedback to provide gain less than unity and a low impedance output to provide feedback around the loop filter to source the current from charge pump 7 entering inverting input of the first stage 5a. Alternatively, stages 5a, 5b may be reversed.
摘要翻译： 放大器装置5a，5b，例如 对于使用用于合成RF信道的电荷泵7的锁相环的运算放大器允许通过将放大器分成两级5a，5b来使用低电源电压。 5a处的输出可以是允许宽电压摆幅的互补晶体管的高阻抗公共发射极对，并且部分5b可以是具有电阻反馈的运算放大器以提供小于单位的增益和低阻抗输出以在环路滤波器周围提供反馈 将来自电荷泵7的电流输入到第一级5a的反相输入端。 或者，阶段5a，5b可以颠倒。
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3.发明公开
公开(公告)号：EP0651520A2
公开(公告)日：1995-05-03
申请号：EP94307720.6
申请日：1994-10-20
CPC分类号： H04L25/065 , H03J7/02 , H03J7/04 , H04B1/26 , H04L7/046 , H04L27/142 , H04L27/148 , H04L27/1525
摘要： In a frequency modulated digital radio transmission system, frequency differences between transmitter and receiver which give rise to DC offsets at the output of the demodulator are countered for any one data transmission by establishing a frequency controlling or DC level controlling signal during a preamble sequence having a known constant DC component, such as the sequence 10101 ------- used for clock or data synchronisation, and retaining that controlling signal substantially unaltered for use during the remainder of that data transmission.
摘要翻译： 在频率调制的数字无线电传输系统中，通过在具有频率调制数字无线电传输系统的前导码序列期间建立频率控制或DC电平控制信号来对通过解调器的输出端产生DC偏移的发射机和接收机之间的频率差异进行抵消， 已知的恒定DC分量，例如用于时钟或数据同步的序列10101 - ，并且在该数据传输的剩余时间期间保持该控制信号基本上不改变以供使用。
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公开(公告)号：EP0484059B1
公开(公告)日：1994-04-27
申请号：EP91309870.3
申请日：1991-10-25
IPC分类号： H03L7/089
CPC分类号： H03L7/0896
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公开(公告)号：EP0651520A3
公开(公告)日：1995-12-13
申请号：EP94307720.6
申请日：1994-10-20
CPC分类号： H04L25/065 , H03J7/02 , H03J7/04 , H04B1/26 , H04L7/046 , H04L27/142 , H04L27/148 , H04L27/1525
摘要： In a frequency modulated digital radio transmission system, frequency differences between transmitter and receiver which give rise to DC offsets at the output of the demodulator are countered for any one data transmission by establishing a frequency controlling or DC level controlling signal during a preamble sequence having a known constant DC component, such as the sequence 10101 ------- used for clock or data synchronisation, and retaining that controlling signal substantially unaltered for use during the remainder of that data transmission.
摘要翻译： 在频率调制的数字无线电传输系统中，通过在前导序列期间建立频率控制或DC电平控制信号来抵消在解调器的输出端处引起DC偏移的发射机和接收机之间的频率差，用于任何一个数据传输 已知的恒定DC分量，例如序列10101 -------用于时钟或数据同步，并且保留该控制信号基本上未改变以供在数据传输的其余部分期间使用。
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公开(公告)号：EP0414392A3
公开(公告)日：1991-04-03
申请号：EP90308476.2
申请日：1990-08-01
摘要： A phase detector comprising a first ramp generator (44) responsive to a reference oscillator (40) input signal for initiating a first ramp waveform, a second ramp generator (54) responsive to a variable frequency oscillator (50) signal input for initiating a second ramp waveform, the first and second ramp generators being coupled respectively to first (46) and second (56) sample and hold circuits, means responsive to the first ramp waveform to actuate the first and second sample and hold circuits, and comparison means (48) for comparing the signal values stored in the first and second hold circuits whereby to provide an output signal indicative of the phase difference between the reference oscillator and variable frequency oscillator input signals.
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公开(公告)号：EP0414392B1
公开(公告)日：1994-10-19
申请号：EP90308476.2
申请日：1990-08-01
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公开(公告)号：EP0484059A3
公开(公告)日：1993-02-24
申请号：EP91309870.3
申请日：1991-10-25
IPC分类号： H03L7/089
CPC分类号： H03L7/0896
摘要： A charge pump circuit comprising an operational amplifier having a first input (+) and a second input (-) and an output, a feedback loop including reactance means coupled between the output and second input,
a first current source providing a first current to a first resistance (R) which is coupled to said first input,
a second current source providing a second current equal to said first current, first npn transistor switch means (Q6) for selectively switching said second current to said second input,
a second resistance (R') equal in value to said first resistance coupled to said second input and second npn transistor switch means (Q3) for selectively switching a third current equal and opposite to said first current via said second resistance to said second input,
whereby said reactance means is charge pumped by said second and third currents.-
公开(公告)号：EP0484059A2
公开(公告)日：1992-05-06
申请号：EP91309870.3
申请日：1991-10-25
IPC分类号： H03L7/089
CPC分类号： H03L7/0896
摘要： A charge pump circuit comprising an operational amplifier having a first input (+) and a second input (-) and an output, a feedback loop including reactance means coupled between the output and second input,
a first current source providing a first current to a first resistance (R) which is coupled to said first input,
a second current source providing a second current equal to said first current, first npn transistor switch means (Q6) for selectively switching said second current to said second input,
a second resistance (R') equal in value to said first resistance coupled to said second input and second npn transistor switch means (Q3) for selectively switching a third current equal and opposite to said first current via said second resistance to said second input,
whereby said reactance means is charge pumped by said second and third currents.摘要翻译： 一种电荷泵电路，包括具有第一输入和第二输入和输出的运算放大器，包括耦合在输出和第二输入之间的电抗装置的反馈回路，提供第一电流到第一电阻的第一电流，第一电阻耦合到 所述第一输入端提供第二电流源，所述第二电流源提供等于所述第一电流，第一npn晶体管开关装置的第二电流，用于选择性地将所述第二电流切换到所述第二输入;第二电阻值与耦合到所述第二输入的所述第一电阻值相等; 第二npn晶体管开关装置，用于通过所述第二电阻选择性地将与所述第一电流相等和相反的第三电流切换到所述第二输入，由此所述电抗装置由所述第二和第三电流泵浦。
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公开(公告)号：EP0414392A2
公开(公告)日：1991-02-27
申请号：EP90308476.2
申请日：1990-08-01
摘要： A phase detector comprising a first ramp generator (44) responsive to a reference oscillator (40) input signal for initiating a first ramp waveform, a second ramp generator (54) responsive to a variable frequency oscillator (50) signal input for initiating a second ramp waveform, the first and second ramp generators being coupled respectively to first (46) and second (56) sample and hold circuits, means responsive to the first ramp waveform to actuate the first and second sample and hold circuits, and comparison means (48) for comparing the signal values stored in the first and second hold circuits whereby to provide an output signal indicative of the phase difference between the reference oscillator and variable frequency oscillator input signals.
摘要翻译： 相位检测器，包括响应于用于启动第一斜坡波形的参考振荡器（40）输入信号的第一斜坡发生器（44），响应于可变频率振荡器（50）信号输入的第二斜坡发生器（54），用于启动第二斜坡波形 第一和第二斜坡发生器分别耦合到第一（46）和第二（56）采样和保持电路，响应于第一斜坡波形来驱动第一和第二采样和保持电路的装置以及比较装置（48） ），用于比较存储在第一和第二保持电路中的信号值，从而提供指示参考振荡器和可变频率振荡器输入信号之间的相位差的输出信号。
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