Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement
    3.
    发明公开
    Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement 失效
    装置用于确定一个集成单片数字电路的静态电流,集成了这样的布置和测试装置的单片数字电路具有这样的布置。

    公开(公告)号:EP0386804A2

    公开(公告)日:1990-09-12

    申请号:EP90200016.5

    申请日:1990-01-04

    IPC分类号: G01R19/28 G01R19/15

    CPC分类号: G01R31/3004 G01R19/15

    摘要: An arrangement is proposed for measuring a quiescent current of a digital IC. The arrangement comprises a current sensor in series with the IC and the supply, voltage stabilization means for stabilizing the voltage across the IC and signal processing means coupled thereto for processing the measured quiescent current. The quiescent current is measured when no flip-flops are switched in the IC. By means of the arrangement, there can be measured rapidly and accurately whether the quiescent current assumes an abnormal value, which indicates that the IC exhibits defects. The signal processing means comprise a current mirror, which is coupled to a current comparator circuit supplying a digital output signal for determining a defect.

    摘要翻译: 的装置,提出了一种用于测量数字IC的静态电流。 该装置包括与IC和电源串联的电流传感器,电压稳定装置用于稳定整个IC上的电压和信号处理装置连接到其上用于处理所述测量的静态电流。 静态电流进行测量时没有触发器在IC切换。 通过该装置的手段,可迅速测定和精确地设定是否异常静态电流übernimmt值,其指示DASS裸片IC展品缺陷。 所述信号处理装置包括一个电流反射镜,所有这一切都耦合到电流比较电路提供用于确定性采矿缺陷的数字输出信号。