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1.发明授权USING THE LEAST SIGNIFICANT BITS OF A CALLED FUNCTION'S ADDRESS TO SWITCH PROCESSOR MODES 有权使用被调用函数的最小重要位来切换处理器模式
公开(公告)号：EP2812792B1
公开(公告)日：2017-10-18
申请号：EP13706805.2
申请日：2013-02-07
发明人： TABONY, Charles Joseph , PLONDKE, Erich James , CODRESCU, Lucian , VENKUMAHANTI, Suresh K. , MENEZES, Evandro Carlos
CPC分类号： G06F9/30189 , G06F9/30054 , G06F9/30076 , G06F9/30149 , G06F9/30181 , G06F9/322 , G06F9/3816
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2.发明公开USING THE LEAST SIGNIFICANT BITS OF A CALLED FUNCTION'S ADDRESS TO SWITCH PROCESSOR MODES 有权用最少的显著位的地址一个叫函数的处理器模式不断变化
公开(公告)号：EP2812792A1
公开(公告)日：2014-12-17
申请号：EP13706805.2
申请日：2013-02-07
发明人： TABONY, Charles Joseph , PLONDKE, Erich James , CODRESCU, Lucian , VENKUMAHANTI, Suresh K. , MENEZES, Evandro Carlos
CPC分类号： G06F9/30189 , G06F9/30054 , G06F9/30076 , G06F9/30149 , G06F9/30181 , G06F9/322 , G06F9/3816
摘要： Systems and methods for tracking and switching between execution modes in processing systems. A processing system is configured to execute instructions in at least two instruction execution modes including a first and second execution mode chosen from a classic/aligned mode and a compressed/unaligned mode. Target addresses of selected instructions such as calls and returns are forcibly misaligned in the compressed mode, such one or more bits, such as, the least significant bits (alignment bits) of the target address in the compressed mode are different from the corresponding alignment bits in the classic mode. When the selected instructions are encountered during execution in the first mode, a decision to switch operation to the second mode is based on analyzing the alignment bits of the target address of the selected instruction.
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