公开(公告)号：EP2545653A1

公开(公告)日：2013-01-16

申请号：EP11752766.3

申请日：2011-02-25

申请人： Rockstar Bidco, LP

发明人： DAVEY, Jonathan ,  JONES, Russell

IPC分类号： H04B1/10 ,  H03M1/12

CPC分类号： H03K5/08 ,  H03K5/1534 ,  H03M1/0629 ,  H03M1/12

摘要： A method and apparatus for reducing the contribution of noise to digitally sampled signals includes a statistical processor and a slope limiter. The statistical processor determines an average value (mean and/or standard deviation) of the filtered signal which is used to determine a slope limit corresponding to an expected maximum first derivative value of a target signal frequency. This slope limit is applied to constrain the output of an analog to digital converter, to prevent the output of the analog to digital converter from exceeding this maximum rate of rise or fall. By constraining the output of the analog to digital converter, it is possible to digitally sample analog signals without first utilizing an anti-aliasing filter, since the post processing of the digitally sampled signals limits the contribution of the higher frequency components of the signal to thereby enable a fully digital sampling and filtering circuit to be provided for receiving signals.