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    PARALLEL DIGITAL TO ANALOG CONVERSION WITH IMAGE SUPPRESSION
    1.
    发明授权
    PARALLEL DIGITAL TO ANALOG CONVERSION WITH IMAGE SUPPRESSION 有权
    并行数字到模拟转换与图像抑制

    公开(公告)号：EP2834919B1

    公开(公告)日：2017-06-07

    申请号：EP13722519.9

    申请日：2013-04-02

    申请人： Telefonaktiebolaget LM Ericsson (publ)

    发明人： WYVILLE, Mark

    IPC分类号： H03M1/06 ,  H03M1/66

    CPC分类号： H03M1/0629 ,  H03M1/662

    摘要： A digital to analog conversion apparatus includes a plurality of gain/phase adjusters configured to receive a digital signal and to output a plurality of adjusted digital input signals, a plurality of digital to analog converters coupled to respective ones of the plurality of gain/phase adjusters and configured to receive the adjusted digital input signals and to generate respective analog signals representative of the adjusted digital input signals, a plurality of phase shift elements coupled to respective ones of the plurality of digital to analog converters and configured to shift the phases of the analog signals generated by the digital to analog converters, and a combiner coupled to the outputs of the plurality of digital to analog converters and configured to combine the respective phase-shifted analog signals to form an analog output signal.

    摘要翻译： 数字到模拟转换设备包括：多个增益/相位调节器，被配置为接收数字信号并输出​​多个调节后的数字输入信号;多个数字到模拟转换器，耦合到多个增益/相位调节器中的相应增益/相位调节器 并且被配置为接收调整后的数字输入信号并且生成表示调整后的数字输入信号的相应模拟信号;多个相移元件，所述多个相移元件耦合到所述多个数模转换器中的相应一个，并且被配置为将所述模拟 由数模转换器产生的信号以及耦合到多个数模转换器的输出并被配置为组合相应的相移模拟信号以形成模拟输出信号的组合器。

    RADIO RECEIVER, METHOD OF DETECTING AN OBTRUDING SIGNAL IN THE RADIO RECEIVER, AND COMPUTER PROGRAM
    3.
    发明公开
    RADIO RECEIVER, METHOD OF DETECTING AN OBTRUDING SIGNAL IN THE RADIO RECEIVER, AND COMPUTER PROGRAM 有权
    无线电接收机，在无线电接收机中检测排气信号的方法，以及计算机程序

    公开(公告)号：EP3213418A1

    公开(公告)日：2017-09-06

    申请号：EP14793087.9

    申请日：2014-10-31

    申请人： Telefonaktiebolaget LM Ericsson (publ)

    发明人： DAS, Sajal Kumar ,  KUPPUSAMY, Vijaykumar

    IPC分类号： H04B1/10 ,  H03M1/06

    CPC分类号： H04B1/1027 ,  H03M1/0629 ,  H04L27/38

    摘要： A method of detecting an obtruding signal in a radio receiver, a receiver and a computer program are disclosed. The receiver has a mixer arranged to mix a received signal to an analog baseband signal at or close to zero-frequency, a filter arranged to low-pass filter said analog baseband signal, and an analog-to-digital converter arranged to sample said filtered analog baseband signal at a sample frequency such that a digital baseband signal is formed. The method comprised receiving a radio frequency signal, mixing the radio frequency signal to the analog baseband signal at or close to zero-frequency, low-pass filtering said analog baseband signal, and analog-to-digital converting said filtered analog baseband signal at an over sample frequency such that a digital baseband signal is formed. The method further comprises frequency translating the digital baseband signal around a Nyquist frequency being based on a nominal sample frequency, the nominal sample frequency being a fraction of the oversampling frequency according to the oversampling rate, to form a translated digital baseband signal such that signal content of the digital baseband signal around zero frequency will be translated to around the nominal sample frequency and vice versa in the translated digital baseband signal, determining a first signal level at zero frequency of the digital baseband signal and a second signal level at zero frequency of the translated digital baseband signal, detecting an obtruding signal based on a relation between the first and second signal levels, and outputting an obtruding signal state signal.

    摘要翻译： 公开了一种检测无线电接收器，接收器和计算机程序中的阻碍信号的方法。 该接收机具有一个混频器，用于将接收信号混频到零频率或接近零频率的模拟基带信号;一个滤波器，用于对所述模拟基带信号进行低通滤波;以及一个模数转换器，用于对所述滤波器 模拟基带信号处于采样频率，从而形成数字基带信号。 该方法包括接收射频信号，将射频信号混频到模拟基带信号处于零频率或接近零频率，对所述模拟基带信号进行低通滤波，并对所述滤波后的模拟基带信号进行模数转换， 超过采样频率，从而形成数字基带信号。 该方法还包括：围绕基于标称采样频率的奈奎斯特频率对数字基带信号进行频率转换，标称采样频率是根据过采样率的过采样频率的一部分，以形成转换后的数字基带信号，使得信号含量 在零频率附近的数字基带信号将被转换成在标准采样频率附近，反之亦然，确定数字基带信号的零频率处的第一信号电平和处于零频率处的第二信号电平 转换的数字基带信号，基于第一和第二信号电平之间的关系来检测阻碍信号，并且输出阻碍信号状态信号。

    PARALLEL DIGITAL TO ANALOG CONVERSION WITH IMAGE SUPPRESSION
    4.
    发明公开
    PARALLEL DIGITAL TO ANALOG CONVERSION WITH IMAGE SUPPRESSION 有权
    平行数字 - 模拟万用木薯片SPIEGELUNTERDRÜCKUNG

    公开(公告)号：EP2834919A2

    公开(公告)日：2015-02-11

    申请号：EP13722519.9

    申请日：2013-04-02

    申请人： Telefonaktiebolaget LM Ericsson (Publ)

    发明人： WYVILLE, Mark

    IPC分类号： H03M1/06 ,  H03M1/66

    CPC分类号： H03M1/0629 ,  H03M1/662

    摘要： A digital to analog conversion apparatus includes a plurality of gain/phase adjusters configured to receive a digital signal and to output a plurality of adjusted digital input signals, a plurality of digital to analog converters coupled to respective ones of the plurality of gain/phase adjusters and configured to receive the adjusted digital input signals and to generate respective analog signals representative of the adjusted digital input signals, a plurality of phase shift elements coupled to respective ones of the plurality of digital to analog converters and configured to shift the phases of the analog signals generated by the digital to analog converters, and a combiner coupled to the outputs of the plurality of digital to analog converters and configured to combine the respective phase-shifted analog signals to form an analog output signal.

    摘要翻译： 数模转换装置包括多个增益/相位调整器，被配置为接收数字信号并输出​​多个经调整的数字输入信号，多个数模转换器耦合到多个增益/相位调节器 并且被配置为接收经调整的数字输入信号并产生表示经调整的数字输入信号的相应模拟信号，多个相移元件耦合到多个数模转换器中的相应数字转换器，并被配置为将模拟 由数模转换器产生的信号，以及组合器，其耦合到多个数模转换器的输出，并且被配置为组合各个相移的模拟信号以形成模拟输出信号。

    A method of and a device for analog signal sampling
    5.
    发明公开
    A method of and a device for analog signal sampling 失效
    Verfahren undGerätzur Abtastung eines Analogsignals

    公开(公告)号：EP0862274A1

    公开(公告)日：1998-09-02

    申请号：EP97200529.2

    申请日：1997-02-26

    申请人： TELEFONAKTIEBOLAGET L M ERICSSON (publ)

    发明人： van Zeijl, Paulus Thomas Maria

    IPC分类号： H03M1/06 ,  H03D1/22

    CPC分类号： H03M1/0629 ,  H03M1/12

    摘要： A method and a device of sampling an analog signal (U(t)) by obtaining first sequences of discrete sample values (S 1 I (t), S 1 Q (t)) of In-phase (I) and Quadrature-phase (Q) components (U i (t), U Q (t)) of the analog signall (U(t)) and second sequences of discrete sample values (S 2 I (t), S 2 Q (t)) of the I and Q components (U i (t), U Q (t)), by sampling of the I and Q components with sampling sequences (φ 1 (t), φ 2 (t)) having equal sampling rate (ω s ) and a mutual phase shift of 90° relative to their sampling rate period (T). The sample values of the I component of the first sequence (S 1 I (t)) and the sample values of the Q component of the second sequence (S 2 Q (t)) are summed (9) to form a third sequence of sample values S 3 (t). The sample values of the Q component of the first sequence (S 1 Q (t)) and the sample values of the I component of the second sequence S 2 I (t)) are summed (10) to form a fourth sequence of sample values (S 4 (t)). The third and fourth sequences of sample values (S 3 (t), S 4 (t)) are further processed during an interval of a particular period (T) of the third and fourth sequences (S 3 (t), S 4 (t)) and starting after the sample values of the first and second sequences (S 1 I (t), S 2 I (t), S 1 Q (t), S 2 Q (t)) of said period (T) are available.

    摘要翻译： 一种通过获得同相（I）和正交相（Q）分量的离散采样值（S1_I（t），S1_Q（t））的第一序列来对模拟信号（U（t））进行采样的方法和装置 （Ui（t））和离散样本值的第二序列（S2_I（t），S2_Q（t））分别为（Ui（t）），UQ（t） ，UQ（t）），通过对具有相同采样率（ω）的采样序列（phi 1（t），phi 2（t））和相对相位相差90°的采样序列 采样率周期（T）。 将第一序列（S1_I（t））的I分量的采样值和第二序列（S2_Q（t））的Q分量的采样值相加（9）以形成第三序列的采样值S < 3）

    METHOD AND APPARATUS FOR REDUCING THE CONTRIBUTION OF NOISE TO DIGITALLY SAMPLED SIGNALS
    7.
    发明公开
    METHOD AND APPARATUS FOR REDUCING THE CONTRIBUTION OF NOISE TO DIGITALLY SAMPLED SIGNALS 审中-公开
    用于减少数字化噪声的方法和设备的信号RECOGNIZED

    公开(公告)号：EP2545653A1

    公开(公告)日：2013-01-16

    申请号：EP11752766.3

    申请日：2011-02-25

    申请人： Rockstar Bidco, LP

    发明人： DAVEY, Jonathan ,  JONES, Russell

    IPC分类号： H04B1/10 ,  H03M1/12

    CPC分类号： H03K5/08 ,  H03K5/1534 ,  H03M1/0629 ,  H03M1/12

    摘要： A method and apparatus for reducing the contribution of noise to digitally sampled signals includes a statistical processor and a slope limiter. The statistical processor determines an average value (mean and/or standard deviation) of the filtered signal which is used to determine a slope limit corresponding to an expected maximum first derivative value of a target signal frequency. This slope limit is applied to constrain the output of an analog to digital converter, to prevent the output of the analog to digital converter from exceeding this maximum rate of rise or fall. By constraining the output of the analog to digital converter, it is possible to digitally sample analog signals without first utilizing an anti-aliasing filter, since the post processing of the digitally sampled signals limits the contribution of the higher frequency components of the signal to thereby enable a fully digital sampling and filtering circuit to be provided for receiving signals.

    APPARATUS AND METHOD FOR ADJUSTING FILTER FREQUENCY IN RELATION TO SAMPLING FREQUENCY
    8.
    发明公开
    APPARATUS AND METHOD FOR ADJUSTING FILTER FREQUENCY IN RELATION TO SAMPLING FREQUENCY 有权
    安排及方法滤波频率采样相关的调整

    公开(公告)号：EP1368897A1

    公开(公告)日：2003-12-10

    申请号：EP02721219.0

    申请日：2002-03-01

    申请人： Optimum Power Technology, L.P.

    发明人： DOUGLAS, Robert ,  McCULLOUGH, Geoffrey

    IPC分类号： H03M1/12

    CPC分类号： H03M1/0629 ,  H03M1/127

    摘要： A self-tuning filter is disclosed. The self-tuning filter includes a digital clocking signal and an input coupled to the digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal changes to a predetermined state. A clock-tunable filter is, furthermore, coupled to the digital clocking signal so that the frequency of the clock-tunable filter is adjusted in relation to a sampling frequency at which the digital clocking signal operates. The self-tuning filter may be applied to an input of a data acquisition unit and applied to an input having a variable sampling frequency. A method of controlling the frequency of a clock-tunable filter is also disclosed.

    Anordnung zur Abtastung eines analogen Signals mit wählbarer Abtastfrequenz
    9.
    发明公开
    Anordnung zur Abtastung eines analogen Signals mit wählbarer Abtastfrequenz 失效
    安排用于采样具有可选择采样频率的模拟信号。

    公开(公告)号：EP0631392A1

    公开(公告)日：1994-12-28

    申请号：EP94109353.6

    申请日：1994-06-17

    申请人： GRUNDIG E.M.V. Elektro-Mechanische Versuchsanstalt Max Grundig GmbH & Co. KG

    发明人： Ziegler, Cornelius, Dipl.-Ing., GRUNDIG E.M.V.

    IPC分类号： H03M1/12

    CPC分类号： H03M1/0629 ,  H03M1/12 ,  H04N1/40 ,  H04N5/14 ,  H04N7/0105

    摘要： Werden bei der Abtastung von analogen Signalen unterschiedliche Abtastfrequenzen zugelassen, tritt das Problem auf, daß die Tiefpaßfilterung vor der Abtastung der jeweiligen Abtastfrequenz angepaßt sein muß, um Interferenzstörungen (Aliasing) zu vermeiden, bzw. um die gewünschte Signalbandbreite vollständig abtasten zu können.
    Bei der vorliegenden Erfindung wird diese Anpassung auf einfache Weise und mit geringem Aufwand dadurch erreicht, daß ein Filter mit geschalteten Kapazitäten verwendet wird, dessen Grenzfrequenz durch eine entsprechend gewählte Taktfrequenz an die jeweilige Abtastfrequenz angepaßt werden kann.

    摘要翻译： 如果允许在模拟信号的采样不同的采样频率，出现的问题是低通滤波，必须在各自的采样频率的采样之前，以避免有害的干扰（混叠），并且能够完全扫描所需的信号带宽相匹配。 在本发明该调节以简单的方式，用由一个过滤器用于与开关电容器，其截止频率可通过适当选择的频率进行调整，以各自的取样频率的事实很少的努力来实现。