Programming method for non-volatile semiconductor memory device
    3.
    发明公开
    Programming method for non-volatile semiconductor memory device 有权
    ProgrammierverfahrenfüreinennichtflüchtigenHalbleiterspeicher

    公开(公告)号:EP1256960A1

    公开(公告)日:2002-11-13

    申请号:EP02002973.2

    申请日:2002-02-11

    IPC分类号: G11C16/04

    摘要: A method is provided for programming data for a memory element of a twin memory cell (i). The word line WL1 is set to a programming word line selection voltage, the control gate CG[i + 1] is set to a programming control gate voltage, and the control gate CG [i] is set to an over-ride voltage. The bit line BL[i + 1] is set to a programming bit line voltage, and the bit line BL[i + 2] is set to Vdd, but not to 0 V.

    摘要翻译: 提供了一种用于对双存储单元(i)的存储元件进行编程数据的方法。 字线WL1被设置为编程字线选择电压,控制栅极CGÄi+ 1u被设置为编程控制栅极电压,并且控制栅极CGÄ设定为过载电压。 位线BLÄi+ 1u设置为编程位线电压,位线BLÄi+ 2u设置为Vdd,但不设置为0V。

    Programming method for non-volatile semiconductor memory device comprising twin-memory cells
    4.
    发明公开
    Programming method for non-volatile semiconductor memory device comprising twin-memory cells 审中-公开
    Programmierverfahrenfüreinen nicht-flüchtigenHalbleiterspeicher mit Twin-Speicherzellen

    公开(公告)号:EP1256959A2

    公开(公告)日:2002-11-13

    申请号:EP02002972.4

    申请日:2002-02-11

    IPC分类号: G11C16/04 G11C16/10

    CPC分类号: G11C16/10 G11C16/0475

    摘要: A method is provided for programming data for a memory element of a twin memory cell (i). The word line WL1 is set to a programming word line selection voltage, the control gate CG[i + 1] is set to a programming control gate voltage, the control gate CG[i] is set to an over-ride voltage, the bit line BL [i + 1] is set to a programming bit line voltage, and the bit line BL[i] is connected to the constant current source.

    摘要翻译: 提供了一种用于对双存储单元(i)的存储元件进行编程数据的方法。 字线WL1被设置为编程字线选择电压,控制栅极CGÄi+ 1u被设置为编程控制栅极电压,控制栅极CG设置为过载电压,位线BLÄi+ 1u是 设置为编程位线电压,位线BLÄiÜ连接到恒流源。