BUFFERING SYSTEM AND METHOD BASED ON INSTRUCTION CACHE
    3.
    发明公开
    BUFFERING SYSTEM AND METHOD BASED ON INSTRUCTION CACHE 审中-公开
    PUFFERSYSTEM UND VERFAHREN AUF DER BASIS EINES BEFEHLSCACHESPEICHERS

    公开(公告)号:EP3037957A4

    公开(公告)日:2017-05-17

    申请号:EP14838463

    申请日:2014-08-18

    IPC分类号: G06F9/38

    摘要: This invention provides a cache system and method based on instruction read buffer (IRB). When applied to the field of processor, it is capable of filling instructions to the instruction read buffer which can be directly accessed by processor core and the processor core outputs instruction to the processor core for execution autonomously and achieve a high cache hit rate.

    摘要翻译: 本发明提供了一种基于指令读缓冲区(IRB)的缓存系统和方法。 当应用于处理器领域时,能够向指令读取缓冲区填充指令,处理器核心可直接访问指令读取缓冲区,处理器核心向处理器核心输出指令以自主执行并实现高缓存命中率。