METHOD AND APPARATUS FOR IMPROVED CODE AUTHENTICATION BETWEEN SOCS AND RE-WRITABLE MEMORY

    公开(公告)号:EP3822838A1

    公开(公告)日:2021-05-19

    申请号:EP20166401.8

    申请日:2020-03-27

    IPC分类号: G06F21/79 G06F21/57

    摘要: The invention discloses a method and an apparatus for improving code authentication between a SoC and a FLASH memory, whereas a FLASH memory size is bigger than an internal memory size of the SoC. The objective to provide a method that makes it more difficult for attacker to inject code and data exchanged between a non-volatile, electrically erasable and re-writable memory and the SoC, which uses the XIP mode will be solved by the following steps:
    - performing a full initial authentication scan of a FLASH image once after a cold boot of the system, and
    - selecting a set of C = 2 n (pseudo-)randomly distributed addresses out of the full FLASH memory size of F = 2 m with n and m are natural numbers and n m, whereas
    - during the initial scan the read content of the FLASH image according to the selected addresses of the set C is concurrently stored as a reference value in an internal RAM of the SoC, whereas
    - a means detects if an address out of set C is read during a cache line fetch and whereas its newly read value is compared against the stored reference value of it, indicating that an attack has occurred if these two values do not match, otherwise no attack has occurred.

    METHOD AND APPARATUS FOR METERING POWER CONSUMPTION OF A DIGITAL SOC FOR PREDICTING BATTERY LIFE

    公开(公告)号:EP3686614A1

    公开(公告)日:2020-07-29

    申请号:EP19189165.4

    申请日:2019-07-30

    发明人: Hesse, Kay

    摘要: The invention discloses a method for metering power consumption of a digital system-on-chip (SoC) for predicting battery life of a battery used by the SoC. The object to find a possibility to observe and meter the battery life of small, low-cost SoC, especially of IoT systems, which is cheap and compact and space-saving, and which can avoid the need for external components, will be solved by the method comprising the following steps: Partitioning of all digital circuitry of the SoC into voltage and/or clock domains; Metering a power consumption of every domain by counting a charge pulse of each domain every time a gate of said domain has been switched; Accumulating said counted charge pulses of each domain by an accumulator; Calculating an overall sum R of all charges drained from the battery by said domains of the SoC; Post-processing said overall sum R for predicting battery life by an integrated micro-processor; and signaling an imminent battery loss; and an apparatus for performing the method of metering power consumption of a SoC