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公开(公告)号:EP0261424B1
公开(公告)日:1994-07-27
申请号:EP87112337.8
申请日:1987-08-25
Applicant: SHIPLEY COMPANY INC.
Inventor: Wilkinson, Gary Morgan , Deckert, Cheryl Ann , Doubrava, Jeffrey J.
CPC classification number: H05K3/422 , C23C18/28 , H05K3/0055 , H05K3/383 , H05K3/42 , H05K3/427 , H05K2203/0796 , H05K2203/122
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公开(公告)号:EP0261424A2
公开(公告)日:1988-03-30
申请号:EP87112337.8
申请日:1987-08-25
Applicant: SHIPLEY COMPANY INC.
Inventor: Wilkinson, Gary Morgan , Deckert, Cheryl Ann , Doubrava, Jeffrey J.
CPC classification number: H05K3/422 , C23C18/28 , H05K3/0055 , H05K3/383 , H05K3/42 , H05K3/427 , H05K2203/0796 , H05K2203/122
Abstract: A process for the formation of a plated through-hole printed circuit board comprising treating a circuit board base material as follows:
1. condition with an oxidant solution;
2 (A). contact with a copper etchant that etches copper and neutralizes oxidant residues on the surface to be plated; and
2 (B). contact with a conditioner that conditions the board surface for enhanced catalyst adsorption; or
2 (A). contact with a neutralizer for oxidant residues that neutralizes said residues and conditions the board surface for enhance catalyst asdorption; and
2 (B). contact with a copper etchant; and
3. catalyze the board; and
4. plate electroless metal onto catalyzed surfaces from a plating solution containing a source of halide ions in a concentration of at least 0.1 moles per liter of solution.
The process is characterized by the absence of a step of acceleration and contains fewer processing steps than prior art processes.Abstract translation: 一种用于形成电镀通孔印刷电路板的方法,包括如下处理电路板基材:1.用氧化剂溶液的状态; 2(A)。 与蚀刻铜并消除待镀表面上的氧化剂残留物的铜蚀刻剂接触; 和2(B)。 与调节板表面的调理剂接触以增强催化剂吸附; 或2(A)。 与用于中和所述残留物的氧化剂残余物的中和剂接触,并且调节板表面以增强催化剂的吸收; 和2(B)。 与铜蚀刻剂接触; 和3.催化董事会; 和4.从含有浓度为每升溶液至少0.1摩尔的卤离子源的电镀溶液将催化表面上的无电金属镀到板上。 该方法的特征在于不存在加速步骤,并且比现有技术方法包含较少的加工步骤。
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公开(公告)号:EP0261424A3
公开(公告)日:1988-09-28
申请号:EP87112337
申请日:1987-08-25
Applicant: SHIPLEY COMPANY INC.
Inventor: Wilkinson, Gary Morgan , Deckert, Cheryl Ann , Doubrava, Jeffrey J.
IPC: C23C18/28
CPC classification number: H05K3/422 , C23C18/28 , H05K3/0055 , H05K3/383 , H05K3/42 , H05K3/427 , H05K2203/0796 , H05K2203/122
Abstract: A process for the formation of a plated through-hole printed circuit board comprising treating a circuit board base material as follows:
1. condition with an oxidant solution; 2 (A). contact with a copper etchant that etches copper and neutralizes oxidant residues on the surface to be plated; and 2 (B). contact with a conditioner that conditions the board surface for enhanced catalyst adsorption; or 2 (A). contact with a neutralizer for oxidant residues that neutralizes said residues and conditions the board surface for enhance catalyst asdorption; and 2 (B). contact with a copper etchant; and 3. catalyze the board; and 4. plate electroless metal onto catalyzed surfaces from a plating solution containing a source of halide ions in a concentration of at least 0.1 moles per liter of solution. The process is characterized by the absence of a step of acceleration and contains fewer processing steps than prior art processes.
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