公开(公告)号：EP0223130A3

公开(公告)日：1987-10-21

申请号：EP86115073

申请日：1986-10-30

申请人： SMH ALCATEL Société Anonyme dite

发明人： Haines, John Gregory ,  Pion, Albert Louis ,  Simon, Elizabeth Ann ,  Mayer, Christopher Martin

IPC分类号： G07B17/02 ,  G11C07/02 ,  G06F15/21

CPC分类号： G06F11/0757 ,  G06F11/004 ,  G06F11/16 ,  G06F12/1433 ,  G07B17/00362 ,  G07B2017/00411

摘要： An improved electronic postage meter which includes a microcomputer (17), redundant memories ("BAMs") (35a-b), and fault flip-flops (30a-b). Im­proved circuitry for controlling the writing to the BAMs includes a timer ("BAM-protection timer") (40) coupled to the write-enable input of each of the BAMs. The BAM-protection timer has a trigger input (43) cou­pled to the microcomputer. The microcomputer is pro­grammed to execute an instruction to generate a trigger­ing signal at the BAM-protection timer's trigger input immediately prior to executing an instruction to write to the BAM. This opens a window for writing; the dura­tion of the window is set to be just long enough to allow the completion of the write operation. The fault flip-flops, once set, unconditionally prevent writing to the BAMs, regardless of any other signals that might be present. The setting of the fault flip-flops is controlled by a first timer ("watchdog timer") (60) and a second timer ("second-chance timer") (62). In normal operation, the microcomputer periodically generates a trigger signal for the watchdog and second-chance timers. The watchdog interval exceeds the maximum interval be­tween triggers under normal conditions. If a trigger is not received, the watchdog timer resets the microcom­puter. The second-chance interval is longer than the watchdog interval, so that the second-chance timer times out and sets the fault flip-flops only if the restart still fails to produce a trigger signal within the spec­ified time.