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公开(公告)号:EP2153523B1
公开(公告)日:2018-03-28
申请号:EP08757163.4
申请日:2008-05-29
IPC分类号: H03L7/181
CPC分类号: H03K5/135 , H03K23/665 , H03L7/091 , H03L7/181
摘要: Systems and methods related to digital frequency locked looping to synchronize frequencies between the local signal from a local oscillator and a reference clock signal from a remote oscillator. A reference counter increments its count for every pulse in the reference clock signal. The value in the reference counter is compared to a configurable reference value. Whenever a match between the reference counter value and the reference value occurs, a hit signal is generated and the reference counter value is reinitialized. Concurrent with the above, a feedback counter increments for every pulse from the local signal. When the hit signal is generated, the value in the feedback counter is compared to a configurable feedback value (by subtraction) to generate a difference value. The difference value is then converted to a frequency adjust signal for use in either increasing or decreasing the frequency of the local oscillator. The hit signal also reinitializes the feedback counter.
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公开(公告)号:EP1854330B1
公开(公告)日:2016-11-30
申请号:EP06705208.4
申请日:2006-02-22
发明人: PASSIER, Chris , MASON, Ralph , ALLEN, Brent
CPC分类号: G08C17/02 , G08C23/04 , H04L1/0007 , H04L1/1607 , H04N21/4126 , H04N21/43637 , H04N21/8106
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