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公开(公告)号:EP1742295B1
公开(公告)日:2013-05-08
申请号:EP06021550.6
申请日:2002-03-05
申请人: Sony Corporation , Arai, Hiroyuki
CPC分类号: H01Q9/14 , H01Q1/243 , H01Q1/36 , H01Q1/38 , H01Q9/0407 , H01Q9/0442 , H01Q21/30
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公开(公告)号:EP1742295A1
公开(公告)日:2007-01-10
申请号:EP06021550.6
申请日:2002-03-05
申请人: SONY CORPORATION , Arai, Hiroyuki
CPC分类号: H01Q9/14 , H01Q1/243 , H01Q1/36 , H01Q1/38 , H01Q9/0407 , H01Q9/0442 , H01Q21/30
摘要: The present invention is an antenna apparatus attached to an electronic device and includes an antenna section (11) having an antenna element (18) provided with two or more power supply points (19) and two or more earth points (20); and an earth point switch (21) which is provided correspondingly to each earth point (20) and connects or disconnects the earth point (20) from a ground. Selectively turning on or off the earth point switch (21) selects the earth point to adjust the resonance frequency.
摘要翻译: 本发明是一种安装在电子装置上的天线装置,包括具有设置有两个以上电源点(19)和两个以上接地点(20)的天线元件(18)的天线部(11)。 以及对应于每个接地点(20)设置并将接地点(20)与地面连接或断开的接地点开关(21)。 选择性地打开或关闭接地点开关(21)选择接地点以调节共振频率。
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公开(公告)号:EP1294090A1
公开(公告)日:2003-03-19
申请号:EP02020486.3
申请日:2002-09-12
申请人: SONY CORPORATION
CPC分类号: H01P1/20345
摘要: The present invention provides a small, thin filter circuit showing a desired filter characteristic which is highly accurate, and producible with a high efficiency. The filter circuit includes a pair of dielectric insulating layers 2 and 3, upper and lower, each having a ground pattern 11 (16) formed on the main side thereof, and an inner wiring layer 4 formed between the dielectric insulating layers 2 and 3 and having capacitively coupled resonator conductive patterns 6 and 7 each connected at one end thereof to the ground patterns 11 and 16 via inter-layer connecting vias 12 and open-circuited at the other end. The filter circuit has formed on the inner wiring layer 4 thereof a plurality of capacitive load patterns 8 to 10 laid along the peripheries of the open-circuited end of the resonator conductive patterns 6 and 7 and electrically isolated from the ground pattern 16, and on one of the dielectric insulating layers 2 and 3 thereof correspondingly to each of the capacitive load patterns 8 to 10 a plurality of capacitive load adjusting patterns 17 to 19 electrically isolated from the ground patterns, electrically connected by the inter-layer connecting vias 24 to 26 to each other, and selectively connected to the ground pattern 16.
摘要翻译: 本发明提供了一种小而薄的滤波器电路,其显示出高度精确并且可高效生产的所需滤波器特性。 滤波器电路包括一对上下电介质绝缘层2和3,每个电介质绝缘层具有形成在其主侧上的接地图案11(16)以及形成在电介质绝缘层2和3之间的内部布线层4以及 具有电容耦合的谐振器导电图案6和7,每个谐振器导电图案6和7的一端通过层间连接通孔12连接到接地图案11和16并且在另一端处开路。 滤波器电路在其内部布线层4上形成多个沿着谐振器导电图案6和7的开路端周边放置并且与接地图案16电隔离的电容性负载图案8至10, 其介电绝缘层2和3中的一个对应于每个电容性负载图案8至10,多个电容性负载调节图案17至19与接地图案电隔离,通过层间连接通孔24至26电连接 彼此连接,并且选择性地连接到接地图案16。
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公开(公告)号:EP1294090B1
公开(公告)日:2004-06-02
申请号:EP02020486.3
申请日:2002-09-12
申请人: SONY CORPORATION
CPC分类号: H01P1/20345
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