公开(公告)号：EP4550979A1

公开(公告)日：2025-05-07

申请号：EP24315475.4

申请日：2024-10-16

Applicant: STMicroelectronics International N.V.

Inventor： Giorgino, Giovanni ,  Castagna, Maria Eloisa ,  Guillon, Virgil ,  Tringali, Cristina ,  Iucolano, Ferdinando ,  Constant, Aurore

IPC: H10D84/05 ,  H10D30/47 ,  H10D62/17 ,  H10D62/85 ,  H10D84/82

Abstract: Methods, systems, and apparatuses for normally-on GaN high electron mobility transistors (HEMT) integration on monolithic p-GaN integrated circuits (ICs) platforms are provided. In particular, the integrated circuit platforms may include both enhancement mode and depletion mode HEMT power devices in monolithically integrated p-GaN power ICs. Exemplary methods may include treating at least one of a plurality of p-GaN gates with an in-situ plasma treatment to deactivate Mg in the p-GaN gate treated and deplete this p-Gan gate of Mg. The depleted p-GaN gate is the gate for the normally on HEMT in the IC. At least one of the p-GaN gates not exposed to the in-situ plasma pretreatment is the gate of the normally off HEMT in the IC.

公开(公告)号：EP4471869A1

公开(公告)日：2024-12-04

申请号：EP24315235.2

申请日：2024-05-16

Applicant: STMicroelectronics International N.V.

Inventor： Castagna, Maria Eloisa ,  Giorgino, Giovanni ,  Iucolano, Ferdinando ,  Tringali, Cristina ,  Constant, Aurore

IPC: H01L29/423 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778 ,  H01L29/10

Abstract: A HEMT device (20;200) including: a semiconductor body (22) forming a semiconductive heterostructure (24,26); a gate region (27) arranged on the semiconductor body (22) and elongated along a first axis (Y); a gate metal region (50) including a respective lower portion (50'), which is arranged on the gate region (27) and is laterally recessed with respect to the gate region (27), and a respective upper portion (50"), which is arranged on the lower portion (50') and has a width greater that the lower portion (50') along a second axis (X); a source metal region (45) extending on the semiconductor body (22) and made at least in part of aluminium; a drain metal region (46) of conductive material, extending on the semiconductor body (22), the source metal region (45) and the drain metal region (46) extending on opposite sides of the gate region (27); a first conductivity enhancement region (35) of aluminium nitride, extending on the semiconductor body (22) and laterally interposed between the source metal region (45) and the gate region (27), the first conductivity enhancement region (35) being in direct contact with the source metal region (45) and being separated from the gate region (27).

公开(公告)号：EP4550977A1

公开(公告)日：2025-05-07

申请号：EP24315479.6

申请日：2024-10-17

Applicant: STMicroelectronics International N.V.

Inventor： Iucolano, Ferdinando ,  Tringali, Cristina ,  Castagna, Maria Eloisa ,  Giorgino, Giovanni ,  Constant, Aurore ,  Guillon, Virgil

IPC: H10D30/01 ,  H01L21/30 ,  H10D30/47 ,  H10D62/17 ,  H10D64/00

Abstract: Methods, systems, and apparatuses for normally off HEMT are provided, including for in situ plasma treatment before Al2O3 deposition for improved on on-hydrogen-based resistance. An exemplary method may include providing a wafer comprising a AlGaN layer and a p-GaN layer; etching the p-GaN layer to form a p-GaN gate; depositing a first aluminum oxide layer over the p-GaN gate; depositing a silicon dioxide layer over the aluminum layer; etching the silicon dioxide layer and the aluminum oxide layer to expose a first portion of the AlGaN layer starting a first distance from the p-GaN gate; treating the first portion of the AlGaN layer with an in-situ hydrogen-based plasma treatment, wherein the in situ plasma treatment deactivates magnesium in the first portion of the AlGaN layer; and forming at least a first normally-off HEMT, wherein the gate of the normally-off HEMT is the first p-GaN gate.

公开(公告)号：EP4546973A1

公开(公告)日：2025-04-30

申请号：EP24315480.4

申请日：2024-10-17

Applicant: STMicroelectronics International N.V.

Inventor： Constant, Aurore ,  Wakrim, Tarik ,  Iucolano, Ferdinando

IPC: H10D30/47 ,  H10D30/01 ,  H10D64/23 ,  H10D64/27 ,  H10D62/17 ,  H10D64/20 ,  H10D62/85

Abstract: A process for forming a high electron mobility transistor (HEMT) includes forming a semiconductor heterostructure including a channel layer of the HEMT, forming a gate (150) layer of GaN on the channel layer, and patterning the gate layer to form a first gate finger, a second gate finger, and a gate arc connecting the first gate finger and the second gate finger. The process includes forming an isolation mask covering an active region of the semiconductor heterostructure and the gate arc and performing an ion bombardment process on an inactive region (142) of the semiconductor heterostructure exposed by the isolation mask.

公开(公告)号：EP4439677A1

公开(公告)日：2024-10-02

申请号：EP24315107.3

申请日：2024-03-26

Applicant: STMicroelectronics International N.V.

Inventor： Iucolano, Ferdinando ,  Chini, Alessandro ,  Castagna, Maria Eloisa ,  Constant, Aurore ,  Tringali, Cristina

IPC: H01L29/778 ,  H01L21/337 ,  H01L29/10 ,  H01L29/41 ,  H01L29/20

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/1066 ,  H01L29/66462

Abstract: The HEMT device (20) has a body (22) including a heterostructure (25) configured to generate a 2-dimensional charge-carrier gas (30, 49); and a gate structure (33) which extends on a top surface (22A) of the body and is biasable to electrically control the 2-dimensional charge-carrier gas. The gate structure has a channel modulating region (40) of semiconductor material; a functional region (41) of semiconductor material; and a gate contact region (42) of conductive material. The functional region and the gate contact region extend on a top surface (40A) of the channel modulating region and the gate contact region is arranged laterally with respect to the functional region. The channel modulating region (40) has a different conductivity type with respect to the functional region (41).