公开(公告)号：EP3537605A1

公开(公告)日：2019-09-11

申请号：EP19160246.5

申请日：2019-03-01

Applicant: STMicroelectronics S.r.l.

Inventor： D'ANGELO, Giuseppe

IPC: H03K17/284 ,  H03K19/0185

Abstract: A half-bridge driver circuit is described. The half-bridge driver circuit comprises a high side driver circuit (200 1 ) configured to generate a high side drive signal as a function of a high side control signal ( IN 1 ) and a low side driver circuit (200 2 ) configured to generate a low side drive signal as a function of a low side control signal ( IN 2 ) . The half-bridge driver circuit comprises moreover a processing circuit (208 1 ) configured to generate the high side and low side control signals ( IN 2 , IN 1 ) as a function of a control signal ( CTR 1 ) . Specifically, the processing circuit (208 1 ) comprises an edge detector (2080, 2082) configured to generate a first signal ( RE ) and a second signal ( FE ) in response to a rising and a falling edge in the control signal ( CTR 1 ) , respectively. A state machine (2084) performs transitions between a plurality of states in response to the first and second signal ( RE , FE ) , wherein the state machine is configured to sequentially:
- in response to the first signal ( RE ) , set the high side and low side control signals ( IN 1 , IN 2 ) to low;
- in response to the second signal ( FE ), set (S2) the high side control signal ( IN 1 ) to high and the low side control signal ( IN 2 ) to low;
- in response to the first signal ( RE ) , set (S3; S1') the high side and low side control signals ( IN 1 , IN 2 ) to low;
- in response to the second signal ( FE ), set (S4) the high side control signal ( IN 1 ) to low and the low side control signal ( IN 2 ) to high.

公开(公告)号：EP3121955A1

公开(公告)日：2017-01-25

申请号：EP16161467.2

申请日：2016-03-21

Applicant: STMicroelectronics S.r.l.

Inventor： D'ANGELO, Giuseppe ,  BISOGNO, Michele ,  CLEMENTE, Virginia

IPC: H02P27/08 ,  H02M7/5395 ,  G06F1/08

CPC classification number: H02K11/02 ,  H02M7/5395 ,  H02P27/08 ,  H02P31/00 ,  H03K4/06

Abstract: An electric motor (M) id controlled by means of pulse-width modulated control signal (PWM, ADC) having edge transitions occurring at certain transition count values of the pulses of a clock signal (20) which is frequency-modulated with a step-wise frequency modulation (e.g. SSCG or Spread Spectrum Clock Generation). A frequency unmodulated clock signal (10) is provided having a fixed period (T PWM_NOM ) indicative of the period of the pulse-width modulated control signals (PWM, ADC). The transition count values are set as a function of a predicted count value and/or a predicted frequency value for the frequency-modulated clock signal (20). Prediction occurs as a function of the frequency unmodulated clock signal (10), so that the transition count values are compensated against the step-wise (e.g. SSCG) frequency modulation.

Abstract translation: 通过脉冲宽度调制控制信号（PWM，ADC）控制的电动机（M）id，其具有在时钟信号（20）的脉冲的某些转换计数值处发生的边沿跃迁， 频率调制（例如SSCG或扩频时钟生成）。 提供频率未调制的时钟信号（10），其具有指示脉宽调制控制信号（PWM，ADC）的周期的固定周期（T PWM_NOM）。 转移计数值被设置为调频时钟信号（20）的预测计数值和/或预测频率值的函数。 作为频率未调制时钟信号（10）的函数发生预测，使得转换计数值被逐级（例如SSCG）频率调制补偿。

公开(公告)号：EP4270771A1

公开(公告)日：2023-11-01

申请号：EP23163350.4

申请日：2023-03-22

Applicant: STMicroelectronics S.r.l.

Inventor： D'ANGELO, Giuseppe

IPC: H02P6/182 ,  H02P27/08 ,  H02P6/10

Abstract: A method for controlling a BLDC motor (11), comprising controlling the rotational speed and/or position of said BLDC motor (11) on the basis of a position of the rotor (θ) of the motor, said position of the rotor (θ) being computed sensing the back electromotive force (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ), said BLDC motor (11) being driven with three driving phases (VP 1 , VP 2 , VP 3 ) supplied to three-phase driving terminals ((N 1 , N 2 , N 3 ) by a three-phase inverter (13), comprising three arms (BR 1 , BR 2 , BR 3 ) comprising each a high side and a low side switch (MH 1 , ML 1 ; MH 2 , ML 2 ; MH 3 , ML 3 ), operating with a sinusoidal commutation, wherein
said method comprises calculating a current position of the rotor (θ) on the basis of zero-crossing times (ZC 1 , ZC 2 , ZC3 3 ) of back electromotive forces (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ), by the following steps:
generating a PWM signal (PWM 1 , PWM 2 , PWM 3 ) comprising three PWM phases comprising each a pair of complementary signals (TH 1 , TL 1 ; TH 2 , TL 2 ; TH 3 , TL 3 ) with dead-time (DT) which duty cycle (DC) value depends on a current position of the rotor (θ),
driving said three-phase inverter (13) supplying each signal of said pair of complementary signals (TH 1 , TL 1 ; TH 2 , TL 2 ; TH 3 , TL 3 ) with dead-time (DT) to a respective high side and low side switch (MH 1 , ML 1 ; MH 2 , ML 2 ; MH 3 , ML 3 ),
sensing back-electromotive forces (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ) at said three-phase driving terminals ((N 1 , N 2 , N 3 ) of said motor (11) and performing (15 1 , 15 2 , 15 3 ) a zero-crossing time measurement on each of said back electromotive forces (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ) obtaining corresponding signals indicating zero-crossing times (ZC 1 , ZC 2 , ZC3 3 ) which are supplied to said operation of calculating a current position of the rotor (θ) on the basis of zero-crossing times (ZC 1 , ZC 2 , ZC3 3 ) of back electromotive forces (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ),
computing (122) triggers signals (TR 1 , TR 2 , TR 3 ), which activate said performing (15 1 , 15 2 , 15 3 ) said zero-crossing time (ZC 1 , ZC 2 , ZC3 3 ) measurement on each of said back electromotive forces (BEMF 1 , BEMF 2 , BEMF 3 ; BEMF' 1 , BEMF' 2 , BEMF' 3 ), identifying the occurrence of a time interval corresponding to the dead time (DT) in the respective PWM phase (PWM 1 , PWM 2 , PWM 3 ; TH 1 , TL 1 ; TH 2 , TL 2 ; TH 3 , TL 3 ), and performing said zero-crossing time (ZC 1 , ZC 2 , ZC3 3 ) measurement during the occurrence of said dead-time (DT).