公开(公告)号：EP4395495A1

公开(公告)日：2024-07-03

申请号：EP23213126.8

申请日：2023-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： CHOI, Dongsung ,  KIM, Byongju ,  PARK, Wonjun ,  JUNG, Jaemin ,  CHEON, Changheon

IPC: H10B43/10 ,  H10B43/27 ,  H10B43/40 ,  H10B43/50

CPC classification number: H10B43/27 ,  H10B43/50 ,  H10B43/40 ,  H10B43/10

Abstract: A non-volatile memory device includes a substrate, a mold structure including a plurality of gate electrodes and a plurality of mold insulating layers, wherein the plurality of gate electrodes are stacked in a step shape, a channel structure that extends through the mold structure, and a cell contact that extends through the mold structure, the cell contact is connected to a first gate electrode, and the cell contact is not electrically connected to a second gate electrode among the plurality of gate electrodes, wherein the first gate electrode includes: an extension portion; a pad portion having a vertical thickness greater than a vertical thickness of the extension portion; and a connection portion that electrically connects the pad portion to the cell contact, the connection portion has a vertical thickness less than a vertical thickness of the pad portion, and one or more first insulating rings on the connection portion.

公开(公告)号：EP4329457A1

公开(公告)日：2024-02-28

申请号：EP23182857.5

申请日：2023-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： KIM, Byongju ,  CHOI, Dongsung ,  PARK, Wonjun ,  LEE, Donghwa ,  JUNG, Jaemin ,  CHEON, Changheon

IPC: H10B43/27

Abstract: A semiconductor device includes a conductive pattern, an insulating pattern, a channel film extending in a vertical direction inside a channel hole, a charge trap pattern between the conductive pattern and the channel film inside the channel hole, a tunneling dielectric film between the charge trap pattern and the channel film, and a blocking dielectric film extending between the conductive pattern and the charge trap pattern and between the insulating pattern and the tunneling dielectric film. The insulating pattern includes a first insulating pattern overlapping the conductive pattern in the vertical direction and a second insulating pattern protruding in the lateral direction from the first insulating pattern into the channel hole and toward the channel film. The first insulating pattern has a first dielectric constant, and the second insulating pattern has a second dielectric constant that is lower than the first dielectric constant.