公开(公告)号：EP4380332A1

公开(公告)日：2024-06-05

申请号：EP23206796.7

申请日：2023-10-30

申请人： Samsung Electronics Co., Ltd.

发明人： KIM, Jun Hyoung ,  KIM, Ji Won ,  LEE, Ah Reum ,  SUNG, Suk Kang

IPC分类号： H10B43/10 ,  H10B43/27 ,  H10B43/40 ,  H10B43/50 ,  H01L23/00 ,  H01L25/18

CPC分类号： H10B43/27 ,  H10B43/40 ,  H10B43/50 ,  H10B43/10 ,  H01L24/08 ,  H01L25/18

摘要： A semiconductor memory device includes a cell substrate (100) including a first surface (100a) and a second surface (100b) opposite to the first surface, a first mold stack, MS1, including a plurality of first gate electrodes, GSL, WL11-WL1n, sequentially stacked on the first surface (100a), a second mold stack, MS2, including a plurality of second gate electrodes, WL21-WL2n, SSL, sequentially stacked on the first mold stack, MS1, a first channel structure, CH1, extending in a first direction with respect to the first surface (100a) and crossing the plurality of first gate electrodes, GSL, WL11-WL1n, and the plurality of second gate electrodes, WL21-WL2n, SSL, and an input/output pad (380) on the second surface (100b), wherein the first mold stack, MS1, includes a mold opening, MSo, that exposes a portion of the second mold stack, MS2, and at least a portion of the input/output pad (380) overlaps the mold opening in the first direction.