公开(公告)号：EP4376066A1

公开(公告)日：2024-05-29

申请号：EP23204015.4

申请日：2023-10-17

申请人： Samsung Electronics Co., Ltd.

发明人： YU, Changyeon ,  KWAK, Pansuk

IPC分类号： H01L21/8234 ,  H01L27/02 ,  H01L27/088

CPC分类号： H01L27/088 ,  H01L21/823475 ,  H01L21/823493 ,  H01L21/823462 ,  H01L27/0207

摘要： A semiconductor device includes a substrate (PSUB), a P-well region (PW), a first N-type metal oxide semiconductor (NMOS) transistor (NM1) provided in the P-well region, a second NMOS transistor (NM2) provided on the substrate, and a common body bias region (JCB) provided between the first NMOS transistor and the second NMOS transistor and contacting both the P-well region and the substrate.

公开(公告)号：EP4428861A1

公开(公告)日：2024-09-11

申请号：EP24161122.7

申请日：2024-03-04

申请人： Samsung Electronics Co., Ltd.

发明人： LEE, Sungun ,  KWAK, Pansuk ,  YU, Changyeon

IPC分类号： G11C5/02 ,  G11C16/04 ,  G11C16/24 ,  G11C16/30 ,  H10B41/27

CPC分类号： G11C5/025 ,  H10B41/27 ,  G11C16/24 ,  G11C16/30 ,  G11C16/0483 ,  H10B43/27

摘要： A memory device includes a stack structure, in which a common source line is formed, and a peripheral circuit structure overlapping the stack structure when viewed in plan view and comprising a common source line driver configured to discharge the common source line. The common source line driver includes a first common source line driving unit, electrically connected to the common source line through a first network and configured to discharge the common source line, and a second common source line driving unit electrically connected to the common source line through a second network, different from the first network, and configured to discharge the common source line. The first common source line driving unit and the second common source line driving unit are controlled independently of each other.

公开(公告)号：EP4395494A1

公开(公告)日：2024-07-03

申请号：EP23205637.4

申请日：2023-10-24

申请人： Samsung Electronics Co., Ltd.

发明人： SHIN, Homoon ,  PARK, Jonghoon ,  YANG, Juyoung ,  HWANG, Jungseok ,  KIM, Sunghoon ,  KWAK, Pansuk ,  KIM, Ahreum ,  LEE, Myunghun ,  YU, Changyeon ,  BAE, Mookyu ,  LEE, Sungun

IPC分类号： H10B43/10 ,  H10B43/27 ,  H10B41/27 ,  H10B41/10 ,  H10B41/40 ,  H10B43/40

CPC分类号： H10B41/40 ,  H10B41/10 ,  H10B43/40 ,  H10B43/10

摘要： A non-volatile memory device may include a memory cell region and a peripheral circuit region positioned below the memory cell region in the vertical direction. The memory cell region may include a plurality of channel structures extending in a vertical direction, a first metal layer over the plurality of channel structures, a first capping layer over the first metal layer, a first upper insulation layer over the first capping layer, and at least one first dummy contact penetrating through the first capping layer. The first metal layer may include a plurality of bit lines and at least one dummy bit line. The bit lines may be respectively connected to the plurality of channel structures. The at least one first dummy contact may be on the at least one dummy bit line and may provide a migration path for hydrogen ions in the first upper insulation layer.