公开(公告)号：EP2216722A2

公开(公告)日：2010-08-11

申请号：EP10157427.5

申请日：2008-06-25

申请人： Sonics, INC. ,  Wingard, Drew E. ,  Chou, Chien-Chun ,  Hamilton, Stephen W. ,  Swarbrick, Ian Andrew ,  Vakilotojar, Vida

发明人： WINGARD, Drew E. ,  CHOU, Chein-Chun ,  HAMILTON, Stephen W. ,  SWARBRICK, Ian Andrew ,  VAKILOTOJAR, Vida

IPC分类号： G06F12/06

CPC分类号： G11C7/1072 ,  G06F12/0607 ,  G06F15/17375 ,  Y02D10/13

摘要： A method, apparatus, and system are described, which generally relate to an interconnect routing transactions to target IP cores, including two or more channels making up a first aggregate target. The two or more channels populate an address space assigned to the first aggregate target and appear as a single target to the initiator IP cores. The interconnect implements chopping logic to chop an individual transaction from a first initiator IP core whose address sequence crosses a channel address boundary from a first channel to a second channel within the first aggregate target into two or more burst transactions. A first chopped burst transaction is chopped to fit within the address boundaries of the first channel and a second chopped burst transaction is chopped to fit within the address boundaries of the second channel.

公开(公告)号：EP2216722B1

公开(公告)日：2019-06-19

申请号：EP10157427.5

申请日：2008-06-25

申请人： Sonics, INC. ,  Wingard, Drew E. ,  Chou, Chien-Chun ,  Hamilton, Stephen W. ,  Swarbrick, Ian Andrew ,  Vakilotojar, Vida

发明人： WINGARD, Drew E. ,  CHOU, Chein-Chun ,  HAMILTON, Stephen W. ,  SWARBRICK, Ian Andrew ,  VAKILOTOJAR, Vida

IPC分类号： G06F12/06 ,  G06F15/173

公开(公告)号：EP2216722A3

公开(公告)日：2012-11-21

申请号：EP10157427.5

申请日：2008-06-25

申请人： Sonics, INC. ,  Wingard, Drew E. ,  Chou, Chien-Chun ,  Hamilton, Stephen W. ,  Swarbrick, Ian Andrew ,  Vakilotojar, Vida

发明人： WINGARD, Drew E. ,  CHOU, Chein-Chun ,  HAMILTON, Stephen W. ,  SWARBRICK, Ian Andrew ,  VAKILOTOJAR, Vida

IPC分类号： G06F12/06 ,  G06F15/173

CPC分类号： G11C7/1072 ,  G06F12/0607 ,  G06F15/17375 ,  Y02D10/13

摘要： A method, apparatus, and system are described, which generally relate to an interconnect routing transactions to target IP cores, including two or more channels making up a first aggregate target. The two or more channels populate an address space assigned to the first aggregate target and appear as a single target to the initiator IP cores. The interconnect implements chopping logic to chop an individual transaction from a first initiator IP core whose address sequence crosses a channel address boundary from a first channel to a second channel within the first aggregate target into two or more burst transactions. A first chopped burst transaction is chopped to fit within the address boundaries of the first channel and a second chopped burst transaction is chopped to fit within the address boundaries of the second channel.

摘要翻译： 一种方法，装置和系统中，其基因反弹涉及互连路由交易到目标IP内核，包括两个或多个通道组成的第一聚合目标。 所述两个或多个信道来填充分配给第一总目标地址空间，并且显示为单个目标到始发者的IP内核。 互连器具斩波逻辑，在单个交易从第一发起者IP核为地址序列跨越从第一通道到所述第一集合目标内的第二通道成两个或更多突发交易的信道地址边界劈。 第一切碎突发事务被切碎以适合第一信道和第二切碎突发事务被切碎以配合第二通道的地址范围内的地址范围内。