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    FOLDING CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER
    2.
    发明公开
    FOLDING CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER 有权
    UMLEGESCHALTUNG UND ANALOG- / DIGITALKONVERTER

    公开(公告)号：EP2051382A1

    公开(公告)日：2009-04-22

    申请号：EP07806629.7

    申请日：2007-09-04

    申请人： Sony Corporation

    发明人： OHKAWA, Takeshi ,  ONO, Koichi ,  MATSUURA, Kouji ,  YAMASITA, Yukitosi ,  TOYOMURA, Junji ,  NAKAMURA, Shogo ,  KANAGAWA, Norifumi

    IPC分类号： H03M1/36 ,  H03M1/14

    CPC分类号： H03M1/0863 ,  H03M1/0682 ,  H03M1/141 ,  H03M1/205 ,  H03M1/365

    摘要： A folding circuit and an analog-to-digital converter wherein a response to small signals is improved, a load on a clock signal can be reduced, and the increase of circuit area can be prevented. The circuit includes a reference voltage generating circuit that generates a plurality of differential voltages as reference voltages, and a plurality of amplification circuits that convert differential voltages between the plurality of reference voltages and an analog input voltage to differential currents, and output these differential currents. The output ends of the amplification circuits are alternately connected. Each of the amplification circuit is configured by a differential amplifier circuit having cascode output transistors (145, 146). A switch (144), which is turned on in synchronization with the control clock, is provided between the both sources of the cascode output transistors (145,146).

    摘要翻译： 折叠电路和模数转换器，其中对小信号的响应得到改善，可以减少对时钟信号的负载，并且可以防止电路面积的增加。 电路包括产生多个差分电压作为参考电压的参考电压产生电路，以及将多个参考电压之间的差分电压和模拟输入电压转换为差分电流的多个放大电路，并输出这些差分电流。 放大电路的输出端交替连接。 每个放大电路由具有共源共栅输出晶体管（145,146）的差分放大器电路构成。 在共源共栅输出晶体管（145,146）的两个源之间提供与控制时钟同步导通的开关（144）。