DC correction arrangement for an analogue to digital converter
    1.
    发明公开
    DC correction arrangement for an analogue to digital converter 失效
    Einem Analog-Digital-Wandler的KorrekturvorrichtungfürGleichanteile

    公开(公告)号:EP0709970A2

    公开(公告)日:1996-05-01

    申请号:EP95307498.6

    申请日:1995-10-20

    IPC分类号: H03M3/02

    摘要: An analogue to digital converter circuit arrangement comprising: an input (24) to receive an analogue signal, a first sampling means (9) operating at a first sampling frequency and operative to generate at an output (23) a digital signal; and a DC correction feedback path (10a) connected between the output (23) and the input (24). The DC correction feedback path comprising in order between the output (23) and input (24) means (25) for integrating said signal at the output (23), second sampling means (27) for sampling the integrated signal at a second sampling frequency which is a much lower frequency than said first sampling frequency, a digital to analogue converter (29) and means (31) for subtracting from the analogue signal received at the input (24) the analogue signal at the output of the digital to analogue converter.

    摘要翻译: 一种模数转换器电路装置,包括:用于接收模拟信号的输入端(24);以第一采样频率工作的第一采样装置(9),用于在输出端(23)产生数字信号; 以及连接在输出(23)和输入(24)之间的DC校正反馈路径(10a)。 DC输出校正反馈路径包括输出(23)和输入(24)之间的顺序,用于在输出端(23)上积分所述信号的装置(25),用于以第二采样频率对积分信号进行采样的第二采样装置 其是比所述第一采样频率低得多的频率,数模转换器(29)和用于从输入端(24)接收的模拟信号中减去数模转换器输出端的模拟信号的装置(31) 。

    DC correction arrangement for an analogue to digital converter
    2.
    发明公开
    DC correction arrangement for an analogue to digital converter 失效
    校正装置,用于在一模拟 - 数字转换器的DC分量

    公开(公告)号:EP0709970A3

    公开(公告)日:1998-04-29

    申请号:EP95307498.6

    申请日:1995-10-20

    IPC分类号: H03M3/02

    摘要: An analogue to digital converter circuit arrangement comprising: an input (24) to receive an analogue signal, a first sampling means (9) operating at a first sampling frequency and operative to generate at an output (23) a digital signal; and a DC correction feedback path (10a) connected between the output (23) and the input (24). The DC correction feedback path comprising in order between the output (23) and input (24) means (25) for integrating said signal at the output (23), second sampling means (27) for sampling the integrated signal at a second sampling frequency which is a much lower frequency than said first sampling frequency, a digital to analogue converter (29) and means (31) for subtracting from the analogue signal received at the input (24) the analogue signal at the output of the digital to analogue converter.