公开(公告)号：EP2447849B1

公开(公告)日：2019-05-01

申请号：EP11183776.1

申请日：2008-09-08

申请人： TOSHIBA MEMORY CORPORATION

发明人： Kanno, Shinichi ,  Yano, Hirokuni ,  Hida, Toshikatsu ,  Kitsunai, Kazuya ,  Yano, Junji

IPC分类号： G06F12/02 ,  G11C16/34 ,  G11C29/52 ,  G11C16/16 ,  G11C29/00 ,  G06F11/10 ,  G06F12/16

公开(公告)号：EP2439645B1

公开(公告)日：2020-01-22

申请号：EP11177759.5

申请日：2011-08-17

申请人： Toshiba Memory Corporation

发明人： Yao, Hiroshi ,  Kanno, Shinichi ,  Fukutomi, Kazuhiro

IPC分类号： G06F12/02 ,  G06F3/06

公开(公告)号：EP2372550B1

公开(公告)日：2018-01-17

申请号：EP11155975.3

申请日：2011-02-25

申请人： Toshiba Memory Corporation

发明人： Kanno, Shinichi

IPC分类号： G06F11/10

CPC分类号： G06F11/1068 ,  G06F11/1012 ,  G06F11/1072 ,  G06F11/1076 ,  G11C16/10 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/1515 ,  H03M13/29 ,  H03M13/2906

摘要： A CRC code is generated from an original data, a BCH code is generated with respect to the original data and the CRC code, and the original data, the CRC code, and the BCH code are recorded in pages selected from different planes of a plurality of memory chips. An RS code is generated from the original data across pages, a CRC code is generated with respect to the RS code, a BCH code is generated with respect to the RS code and the CRC code, and the RS code, the CRC code, the BCH code are recorded in a memory chip different from a memory chip including the original data. When reading data, error correction is performed on the original data by using the BCH code, and then CRC is calculated. If the number of errors is the number of errors that is correctable by erasure correction using the RS code, the original data is corrected by the erasure correction. If the number of errors exceeds an erasure correction capability of the RS code, normal error correction using the RS code is performed, and further error correction using the BCH code is performed.

公开(公告)号：EP3121718B1

公开(公告)日：2018-08-01

申请号：EP15190796.1

申请日：2015-10-21

申请人： TOSHIBA MEMORY CORPORATION

发明人： Kanno, Shinichi

IPC分类号： G06F11/10

CPC分类号： G06F11/1008 ,  G06F11/1012 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/108 ,  G11C16/349 ,  H03M13/05 ,  H03M13/611

摘要： According to one embodiment, a memory system includes a nonvolatile memory (5) and a controller (4). The controller (4) manages a plurality of namespaces (NS #1 to NS #n) for storing a plurality of kinds of data having different update frequencies. The controller (5) encodes write data by using first coding for reducing wear of a memory cell to generate first encoded data, and generates second encoded data to be written to the nonvolatile memory (5) by adding an error correction code to the first encoded data. The controller (4) changes the ratio between the first encoded data and the error correction code based on the namespace to which the write data is to be written.