FM-PLL modulator
    2.
    发明公开
    FM-PLL modulator 有权
    频率调制器Verwendung eines Phasenregelkreises

    公开(公告)号:EP1249929A1

    公开(公告)日:2002-10-16

    申请号:EP01400914.6

    申请日:2001-04-09

    IPC分类号: H03C3/09

    CPC分类号: H03C3/0983 H03C3/0966

    摘要: A transmitter architecture (200) provides for a stable and low noise modulator where the modulation bandwidth is uncorrelated to the TX loop bandwidth. The output signal (228) of the TX loop is demodulated by a demodulator (208) and the demodulated signal is compared by a comparator (206) with the modulating input signal (202). The output of the comparator is then used to adjust a digital pre-emphasis filter (204) which preconditions the modulating input signal (202) in the digital domain. The preconditioning approach of the present invention provides for low noise because the transmitter designer can chose a narrow band for the TX loop which will also filter out the noise coming from the additional synthesizer (226) used to down convert the input signal.

    摘要翻译: 锁相环(PLL)接收调制信号并输出​​调制射频(RF)信号。 相位解调器接收RF信号并输出​​相位信息信号。 比较器接收相位信息信号和调制信号并输出​​误差信号。 响应于误差信号的预加重滤波器调整提供给PLL的调制信号。 包括以下独立权利要求:(1)产生稳定和低噪声调制器的方法。