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151 条记录 (耗时 0.018 秒)

    DIGITAL PHASE-LOCKED LOOP WITH TWO-POINT MODULATION AND ADAPTIVE DELAY MATCHING
    3.
    发明公开
    DIGITAL PHASE-LOCKED LOOP WITH TWO-POINT MODULATION AND ADAPTIVE DELAY MATCHING 有权
    与两点调制数字锁相环路使用延迟的自适应补偿两路调制

    公开(公告)号：EP2374209A2

    公开(公告)日：2011-10-12

    申请号：EP09793389.9

    申请日：2009-12-09

    申请人： QUALCOMM Incorporated

    发明人： GENG, Jifeng ,  BALLANTYNE, Gary, John ,  FILIPOVIC, Daniel, F.

    IPC分类号： H03C3/09

    CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966

    摘要： A digital phase-locked loop (DPLL) supporting two-point modulation with adaptive delay matching is described. The DPLL includes highpass and lowpass modulation paths that support wideband and narrowband modulation, respectively, of the frequency and/or phase of an oscillator. The DPLL can adaptively adjust the delay of one modulation path to match the delay of the other modulation path. In one design, the DPLL includes an adaptive delay unit that provides a variable delay for one of the two modulation paths. Within the adaptive delay unit, a delay computation unit determines the variable delay based on a modulating signal applied to the two modulation paths and a phase error signal in the DPLL. An interpolator provides a fractional portion of the variable delay, and a programmable delay unit provides an integer portion of the variable delay.

    Phase locked loop method and apparatus
    4.
    发明公开
    Phase locked loop method and apparatus 审中-公开
    锁相环的方法和装置

    公开(公告)号：EP2244375A3

    公开(公告)日：2010-11-03

    申请号：EP10155392.3

    申请日：2003-08-28

    申请人： QUALCOMM Incorporated

    发明人： Ballantyne, Gary J.

    IPC分类号： H03C3/09

    CPC分类号： H03C3/0983 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966

    摘要： A communications system using a phase locked loop employing two-point modulation is disclosed. The phase locked loop further includes a master oscillator having an output operably coupled to a first input of the phase detector; a slave oscillator having an output operably coupled to a second input of the phase detector, and a forward-gain-adaptation module having a first input operably coupled to the raw-error terminal of the phase detector.

    Phase locked loop method and apparatus
    5.
    发明公开
    Phase locked loop method and apparatus 审中-公开
    锁相环方法和设备

    公开(公告)号：EP2244375A2

    公开(公告)日：2010-10-27

    申请号：EP10155392.3

    申请日：2003-08-28

    申请人： QUALCOMM Incorporated

    发明人： Ballantyne, Gary J.

    IPC分类号： H03C3/09

    CPC分类号： H03C3/0983 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966

    摘要： A communications system using a phase locked loop employing two-point modulation is disclosed. The phase locked loop further includes a master oscillator having an output operably coupled to a first input of the phase detector; a slave oscillator having an output operably coupled to a second input of the phase detector, and a forward-gain-adaptation module having a first input operably coupled to the raw-error terminal of the phase detector.

    摘要翻译： 公开了使用采用两点调制的锁相环的通信系统。 锁相环还包括主振荡器，该主振荡器具有可操作地耦合到相位检测器的第一输入端的输出端; 具有可操作地耦合到相位检测器的第二输入的输出的从属振荡器以及具有可操作地耦合到相位检测器的原始误差端子的第一输入的前向增益适应模块。

    METHOD AND APPARATUS FOR FREQUENCY SYNTHESIS IN DIRECT-CONVERSION TRANSMITTERS
    8.
    发明公开
    METHOD AND APPARATUS FOR FREQUENCY SYNTHESIS IN DIRECT-CONVERSION TRANSMITTERS 有权
    方法和设备频率合成AT与直接变换STATIONS

    公开(公告)号：EP1905165A1

    公开(公告)日：2008-04-02

    申请号：EP06777581.7

    申请日：2006-07-05

    申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ)

    发明人： LOMBARDI, Frank ,  FREED, John, G. ,  ISBERG, Martin

    IPC分类号： H04B1/50 ,  H04B1/40

    CPC分类号： H04B1/30 ,  H03C3/0966 ,  H03C3/0983 ,  H03C5/00 ,  H03L7/185 ,  H03L7/1974 ,  H03L7/23

    摘要： A method and apparatus for direct-conversion transmission generates a first frequency signal that is non-harmonically related to a transmit frequency signal, divides the first frequency signal to obtain a mixing frequency signal, divides the first frequency signal to obtain an intermediate frequency reference signal, generates the transmit frequency signal by using the mixing frequency signal to downconvert the transmit frequency signal into an intermediate frequency feedback signal, and phase-locks the intermediate frequency feedback signal to the intermediate frequency reference signal. The transmit frequency signal may be phase modulated, and may serve as an input to a saturated-mode power amplifier that can be configured for corresponding amplitude modulation. Alternatively, the un-modulated transmit frequency signal serves as the carrier signal input to a quadrature modulator, which imparts I/Q modulations to it, thereby producing a modulated carrier signal for input to a linear power amplifier.

    TWO-POINT MODULATION TYPE PHASE MODULATING APPARATUS, POLAR MODULATION TRANSMITTING APPARATUS, RADIO TRANSMITTING APPARATUS, AND WIRELESS COMMUNICATION APPARATUS
    9.
    发明公开
    TWO-POINT MODULATION TYPE PHASE MODULATING APPARATUS, POLAR MODULATION TRANSMITTING APPARATUS, RADIO TRANSMITTING APPARATUS, AND WIRELESS COMMUNICATION APPARATUS 审中-公开
    与两点调制相位调制设备，与极性调制，远程设备和无线通信设备的发送装置;

    公开(公告)号：EP1816816A1

    公开(公告)日：2007-08-08

    申请号：EP06745574.1

    申请日：2006-04-21

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： HIRANO, Shunsuke, Matsushita Elect. Ind. Co.,Ltd ,  ADACHI, Hisashi, Matsushita Elect. Ind. Co.,Ltd

    IPC分类号： H04L27/20 ,  H03C3/00 ,  H03C3/09 ,  H03L7/18 ,  H04B1/04

    CPC分类号： H04L27/20 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966

    摘要： There provides a two-point modulation phase modulation apparatus capable of obtaining an RF phase modulation signal of superior modulation precision with low power consumption and a simple configuration even in the event of inputting a wide band baseband modulation signal. A differentiator (21) of the opposite characteristics to the attenuation characteristics of anti-alias filter (22) is provided at the front stage of a D/A converter (6). As a result, it is possible to sufficiently suppress an alias signal without raising the sampling frequency of the D/A converter (6) (i.e. low power consumption) using an anti-alias filter (22) of a simple configuration (i.e. low cost) with a low order for a narrower bandwidth than a PLL modulation frequency bandwidth, and it is possible to obtain an RF phase modulation signal where the entire frequency band of input digital baseband modulation signal (S1) is reflected in a superior manner.

    摘要翻译： 那里提供了一种能够以低功耗和简单的结构，即使在输入的宽带基带调制信号的情况下优异的调制精度的RF相位调制信号的获得的两点调制的相位调制装置。 的相反的特性来抗混叠滤波器（22）的衰减特性的微分器（21）在D的前级设置/ A转换器（6）。 其结果是，能够充分地抑制别名信号而不增加D的采样频率利用简单的结构的抗混叠滤波器（22）/ A转换器（6）（即，低功耗）（即低成本 ）用低阶比的PLL调制频率带宽窄的带宽，并且能够得到在其中输入数字基带调制信号（S1）的全部频带被反映在优越的方式RF相位调制信号。

    Method and apparatus for frequency modulation
    10.
    发明公开
    Method and apparatus for frequency modulation 有权
    对频率调制的方法和装置

    公开(公告)号：EP1345375A3

    公开(公告)日：2006-10-25

    申请号：EP03005251.8

    申请日：2003-03-10

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Adachi, Hisashi ,  Sakakura, Makoto

    IPC分类号： H04L27/12 ,  H03C3/09

    CPC分类号： H03C3/0966 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0958 ,  H03L7/1976 ,  H03M7/3022 ,  H03M7/3037 ,  H03M7/304 ,  H04L27/12

    摘要： A voltage controlled oscillator (1), a variable frequency divider (2), a phase comparator (3), and a loop filter (4) form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part (M2) of the frequency division factor data with modulation data (X) by using an output signal of the variable frequency divider (2) as a clock. An output signal of the sigma-delta modulator (5) is added to an integral part (M1) of the frequency division factor data, and the resultant data becomes effective frequency division factor data (13) of the variable frequency divider (2). An output signal of the sigma-delta modulator (5) also becomes control data (14) after passing through a D/A converter (6), a low-pass filter (7), and an amplitude adjustment circuit (8). The control data (14) is inputted into a frequency modulation terminal of the voltage controlled oscillator (1). Therefore, it is possible to provide a frequency modulator that can use a reference signal source having no frequency modulation function, and perform modulation over a wide range of frequencies based on a digital modulation signal.