公开(公告)号：EP3374874A1

公开(公告)日：2018-09-19

申请号：EP16865153.7

申请日：2016-11-11

申请人： Total Phase, Inc.

发明人： HOLDEN, Thomas, P. ,  SANTHANAM, Kumaran

IPC分类号： G06F13/00

CPC分类号： G06F9/455 ,  G06F9/4411 ,  G11C11/005 ,  G11C14/0009 ,  G11C14/0054

摘要： A digital logic device is disclosed that includes registers, SRAM, DRAM, and a processor configured to store in the registers an initial portion of a first response data to a command, and store in the SRAM the first response data. The processor is further configured to store in a lookup table the memory location and size of the first response data in the SRAM, store in the DRAM additional response data, and store in the lookup table the memory location and size of the additional response data in the DRAM. The processor is configured to receive the command from a host device, retrieve the first response data from the registers or the SRAM, and send the first response data to the host. If the command includes additional response data, the processor is configured to concurrently retrieve the additional response data from DRAM and send the additional response data to the host.