公开(公告)号：EP0883930A1

公开(公告)日：1998-12-16

申请号：EP97949489.0

申请日：1997-11-19

申请人： VARIAN ASSOCIATES, INC.

发明人： ALLEN, Max, J. ,  COLBETH, Richard, E. ,  MALLINSON, Martin

IPC分类号： H03K17

CPC分类号： H03K17/6264 ,  H03K17/04113

摘要： A current mode analog signal multiplexor includes multiple input multiplexed differential amplifiers (12, 14), a reference amplifier ( 12.0, 14.0) and an output differential current amplifier (18, 20). An input multiplex control signal selects and enables one of the input multiplexed differential amplifiers for buffering and steering the input signal current to one side of the output differential current amplifier. The reference amplifier drives the other side of the output differential current amplifier. The output node of the output differential current amplifier remains at a substantially constant voltage potential while providing an output current which varies in relation to the selected input signal.

公开(公告)号：EP0882325A1

公开(公告)日：1998-12-09

申请号：EP97952189.0

申请日：1997-11-13

申请人： VARIAN ASSOCIATES, INC.

发明人： COLBETH, Richard, E. ,  ALLEN, Max, J. ,  MALLINSON, Martin

IPC分类号： H03F1 ,  H03F3

CPC分类号： H03F3/45076 ,  H03F1/223 ,  H03F3/345

摘要： A charge sensitive amplifier with high common mode signal rejection includes an NPN bipolar junction transistor (BJT) and a P-channel metal oxide semiconductor field effect transistor (MOSFET) connected in a totem pole circuit configuration. The BJT base terminal receives a dc reference voltage, the MOSFET gate terminal receives the incoming data signal, the MOSFET drain terminal is grounded and the BJT collector terminal provides the output voltage signal and is biased by the power supply through a resistive circuit element. The MOSFET operates as a source follower amplifier with the transconductance of the BJT serving as the load at the source terminal, while the BJT operates as a common emitter amplifier with the transconductance of the MOSFET providing emitter degeneration. The signal gains of such source follower and common emitter amplifiers are substantially equal and of opposite polarities. Therefore, any common mode signal components due to common mode input signals present at the input terminals (i.e., the BJT base and MOSFET gate terminals) which would otherwise appear within the output signal are substantially cancelled, thereby resulting in a high degree of common mode signal rejection.

公开(公告)号：EP0882295A1

公开(公告)日：1998-12-09

申请号：EP97949488.0

申请日：1997-11-19

申请人： VARIAN ASSOCIATES, INC.

发明人： MALLINSON, Martin ,  ALLEN, Max, J. ,  COLBETH, Richard, E.

IPC分类号： G11C27

CPC分类号： G11C27/026

摘要： A signal sampling circuit for performing correlated double sampling (CDS) of an input signal with a pipelined sample and hold architecture includes a time multiplexed integrating amplifier circuit in which the output circuit is a pipelined sample and hold circuit which provides time multiplexed input signal samples and the feedback integration capacitor is discharged between samples. At all times, one of the channels of the pipelined sample and hold circuit is providing one of the time multiplexed input signal samples while the other channel continues tracking the input signal. The feedback integration capacitor acts as a clamp to null out residual reset noise received as part of the input signal to be sampled. Hence, with the exception of that very brief period of time necessary for switching between the two pipelined sample and hold circuit channels, one of the two pipelined sample and hold circuit channels is always available for signal acquisition.