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公开(公告)号：EP1791336A2
公开(公告)日：2007-05-30
申请号：EP06256022.2
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： H04M1/6066 , H04M1/642 , H04M1/6505 , H04M1/656 , H04M1/72522 , H04M1/7255 , H04M1/72558 , H04M2250/74
摘要： The present invention provides a method of operating a digital audio device, the method comprising: receiving a voice call; receiving another digital audio signal which is not a voice call; mixing the two received signals; transmitting the mixed signal wirelessly to another device.
摘要翻译： 本发明提供了一种操作数字音频设备的方法，所述方法包括：接收语音呼叫; 接收不是语音呼叫的另一数字音频信号; 混合两个接收信号; 将混合信号无线发送到另一设备。
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公开(公告)号：EP2360597B1
公开(公告)日：2014-01-08
申请号：EP11165440.6
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： G10L19/008 , G06F3/162 , H03M1/12 , H03M1/66 , H04B7/2653 , H04B7/2659 , H04L5/14 , H04M1/0202
摘要： The present invention provides an audio codec for converting digital audio signals to analogue audio signals, the audio codec comprising: two digital audio bus interfaces for coupling to respective digital audio buses; a digital-only signal path between the two digital audio bus interfaces, such that no analogue processing of the audio signals occurs in the digital-only signal path.
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公开(公告)号：EP1791336B1
公开(公告)日：2013-02-27
申请号：EP06256022.2
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： H04M1/6066 , H04M1/642 , H04M1/6505 , H04M1/656 , H04M1/72522 , H04M1/7255 , H04M1/72558 , H04M2250/74
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公开(公告)号：EP2360597A3
公开(公告)日：2011-09-21
申请号：EP11165440.6
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： G10L19/008 , G06F3/162 , H03M1/12 , H03M1/66 , H04B7/2653 , H04B7/2659 , H04L5/14 , H04M1/0202
摘要： The present invention provides an audio codec for converting digital audio signals to analogue audio signals, the audio codec comprising: at least two digital audio bus interfaces (40, 41) for coupling to respective digital audio buses or bus sections; digital- to-analogue conversion means (13, 14) for converting digital audio signals received through first and second digital audio bus interfaces to analogue audio signals, for output to an audio transducer (10); adding means (15a, 15b) for adding together digital audio signals received through the first and second digital audio bus interfaces to form a combined digital audio signal; and means to route the combined signal to one of the first and second digital audio bus interfaces of the audio codec, or to a third digital audio bus interface of the audio codec, for transmission on a digital audio bus or bus section.
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公开(公告)号：EP2128773A2
公开(公告)日：2009-12-02
申请号：EP09161900.7
申请日：2006-11-24
发明人： Sinai, David
IPC分类号： G06F13/40
CPC分类号： G06F13/4022
摘要： The present invention provides a digital bus circuit comprising: a bus conductor having two sections each connected to a pass circuit, each bus section being connected to two bus interfaces for respective circuits; at least three of the bus interfaces comprising a tri-state output buffer having a tri-state mode and one or more logic output modes; wherein in a unitary bus mode the tri-state output buffers are arranged such that only one of said output buffers is not in a tri-state mode, and the pass circuit is arranged to substantially couple said bus sections; and wherein in a dual bus mode the tri-state output buffers are arranged such that only one of the output buffers connected to each bus section is not in a tri-state mode, and wherein the pass circuit is arranged to substantially isolate said bus sections.
摘要翻译： 本发明提供了一种数字总线电路，包括：总线导体，其具有两个部分，每个部分连接到通过电路，每个总线部分连接到用于各个电路的两个总线接口; 至少三个总线接口包括具有三态模式和一个或多个逻辑输出模式的三态输出缓冲器; 其中在单一总线模式中，三状态输出缓冲器被布置成使得仅一个所述输出缓冲器不处于三态模式，并且所述通路电路被布置成基本上耦合所述总线段; 并且其中在双总线模式中，所述三态输出缓冲器被布置为使得仅连接到每个总线部分的输出缓冲器中的仅一个不处于三态模式，并且其中所述通路电路被布置为基本上隔离所述总线部分 。
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公开(公告)号：EP1791061B1
公开(公告)日：2009-07-22
申请号：EP06256028.9
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： G06F13/4022
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公开(公告)号：EP2360597A2
公开(公告)日：2011-08-24
申请号：EP11165440.6
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： G10L19/008 , G06F3/162 , H03M1/12 , H03M1/66 , H04B7/2653 , H04B7/2659 , H04L5/14 , H04M1/0202
摘要： The present invention provides an audio codec for converting digital audio signals to analogue audio signals, the audio codec comprising: at least two digital audio bus interfaces (40, 41) for coupling to respective digital audio buses or bus sections; digital- to-analogue conversion means (13, 14) for converting digital audio signals received through first and second digital audio bus interfaces to analogue audio signals, for output to an audio transducer (10); adding means (15a, 15b) for adding together digital audio signals received through the first and second digital audio bus interfaces to form a combined digital audio signal; and means to route the combined signal to one of the first and second digital audio bus interfaces of the audio codec, or to a third digital audio bus interface of the audio codec, for transmission on a digital audio bus or bus section.
摘要翻译： 本发明提供了一种用于将数字音频信号转换成模拟音频信号的音频编解码器，该音频编解码器包括：至少两个数字音频总线接口（40,41），用于耦合到相应的数字音频总线或总线部分; 数 - 模转换装置（13,14），用于将通过第一和第二数字音频总线接口接收的数字音频信号转换为模拟音频信号，以输出到音频换能器（10）; 添加装置（15a，15b），用于将通过所述第一和第二数字音频总线接口接收的数字音频信号相加在一起以形成组合的数字音频信号; 以及用于将组合信号路由到音频编解码器的第一和第二数字音频总线接口中的一个或音频编解码器的第三数字音频总线接口以在数字音频总线或总线部分上传输的装置。
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公开(公告)号：EP1791336A3
公开(公告)日：2010-05-12
申请号：EP06256022.2
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： H04M1/6066 , H04M1/642 , H04M1/6505 , H04M1/656 , H04M1/72522 , H04M1/7255 , H04M1/72558 , H04M2250/74
摘要： The present invention provides a method of operating a digital audio device, the method comprising: receiving a voice call; receiving another digital audio signal which is not a voice call; mixing the two received signals; transmitting the mixed signal wirelessly to another device.
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公开(公告)号：EP2128773A3
公开(公告)日：2009-12-09
申请号：EP09161900.7
申请日：2006-11-24
发明人： Sinai, David
IPC分类号： G06F13/40
CPC分类号： G06F13/4022
摘要： The present invention provides a digital bus circuit comprising: a bus conductor having two sections each connected to a pass circuit, each bus section being connected to two bus interfaces for respective circuits; at least three of the bus interfaces comprising a tri-state output buffer having a tri-state mode and one or more logic output modes; wherein in a unitary bus mode the tri-state output buffers are arranged such that only one of said output buffers is not in a tri-state mode, and the pass circuit is arranged to substantially couple said bus sections; and wherein in a dual bus mode the tri-state output buffers are arranged such that only one of the output buffers connected to each bus section is not in a tri-state mode, and wherein the pass circuit is arranged to substantially isolate said bus sections.
摘要翻译： 本发明提供了一种数字总线电路，包括：具有两个部分的总线导体，每个部分连接到通路，每个总线部分连接到用于相应电路的两个总线接口; 至少三个总线接口包括具有三态模式和一个或多个逻辑输出模式的三态输出缓冲器; 其中在单一总线模式中，所述三态输出缓冲器被布置为使得所述输出缓冲器中仅一个不处于三态模式，并且所述通过电路被布置为基本上耦合所述总线部分; 并且其中在双总线模式中，所述三态输出缓冲器被布置为使得仅连接到每个总线部分的所述输出缓冲器中的一个不处于三态模式，并且其中所述通过电路被布置为将所述总线部分 。
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公开(公告)号：EP1791061A1
公开(公告)日：2007-05-30
申请号：EP06256028.9
申请日：2006-11-24
发明人： Sinai, David
CPC分类号： G06F13/4022
摘要： The present invention provides a digital bus circuit comprising: a bus conductor having two sections each connected to a pass circuit, each bus section being connected to two bus interfaces for respective circuits; at least three of the bus interfaces comprising a tri-state output buffer having a tri-state mode and one or more logic output modes; wherein in a unitary bus mode the tri-state output buffers are arranged such that only one of said output buffers is not in a tri-state mode, and the pass circuit is arranged to substantially couple said bus sections; and wherein in a dual bus mode the tri-state output buffers are arranged such that only one of the output buffers connected to each bus section is not in a tri-state mode, and wherein the pass circuit is arranged to substantially isolate said bus sections.
摘要翻译： 本发明提供了一种数字总线电路，包括：具有两个部分的总线导体，每个部分连接到通路，每个总线部分连接到用于相应电路的两个总线接口; 至少三个总线接口包括具有三态模式和一个或多个逻辑输出模式的三态输出缓冲器; 其中在单一总线模式中，所述三态输出缓冲器被布置为使得所述输出缓冲器中仅一个不处于三态模式，并且所述通过电路被布置为基本上耦合所述总线部分; 并且其中在双总线模式中，所述三态输出缓冲器被布置为使得仅连接到每个总线部分的所述输出缓冲器中的一个不处于三态模式，并且其中所述通过电路被布置为将所述总线部分 。
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