公开(公告)号：EP0881780A3

公开(公告)日：2003-09-17

申请号：EP98103944.9

申请日：1998-03-05

申请人： NTT DoCoMo, Inc. ,  Yozan, Inc.

发明人： Zhou, Changming ,  Shou, Guoliang ,  Suzuki, Kunihiko ,  Zhou, Xuping ,  Qin, Xiaoling ,  Chen, Jie ,  Sawahashi, Mamoru ,  Adachi, Fumiyuki

IPC分类号： H04B1/707

CPC分类号： H04B1/7113 ,  H04B1/7117 ,  H04B1/712 ,  H04B1/7183

摘要： A signal reception apparatus in the spectrum spread communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits 31 through 34 calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit 40 corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A RAKE combiner synchronously combines the phase-corrected de-spread received signals of each path.

摘要翻译： 频谱扩展通信系统中的信号接收装置仅需要少量的电路并且消耗少量的电力。 正交检波器将接收信号分解成同相分量和正交分量，并将它们提供给复合型匹配滤波器。 复合型匹配滤波器对同相分量和正交分量进行解扩，并将它们发送到多路径选择器。 多路径选择器从接收到的解扩信号中选择具有高电平信号电功率的多个路径，并将所选路径的接收信号发送到多个相位校正块。 模拟操作电路31至34为每个路径计算两个连续导频符号块的接收信号的相位误差。 模拟操作电路40校正在两个连续导频符号块之间接收的信息符号块的接收信号的相位。 RAKE组合器同步组合每条路径的经相位校正的解扩接收信号。

公开(公告)号：EP0881780A2

公开(公告)日：1998-12-02

申请号：EP98103944.9

申请日：1998-03-05

申请人： NTT MOBILE COMMUNICATIONS NETWORK INC. ,  YOZAN INC.

发明人： Zhou, Changming ,  Shou, Guoliang ,  Suzuki, Kunihiko ,  Zhou, Xuping ,  Qin, Xiaoling ,  Chen, Jie ,  Sawahashi, Mamoru ,  Adachi, Fumiyuki

IPC分类号： H04B1/707

CPC分类号： H04B1/7113 ,  H04B1/7117 ,  H04B1/712 ,  H04B1/7183

摘要： A signal reception apparatus in the spectrum spread communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits 31 through 34 calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit 40 corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A RAKE combiner synchronously combines the phase-corrected de-spread received signals of each path.

摘要翻译： 频谱扩展通信系统中的信号接收装置仅需要少量的电路并消耗少量的电力。 正交检测器将接收信号分解为同相分量和正交分量，并将其提供给复合型匹配滤波器。 复合型匹配滤波器对同相分量和正交分量进行解扩，并将其发送到多路径选择器。 多径选择器从接收的解扩信号中选择具有高电平信号电功率的多个路径，并将所选择的路径的接收信号发送到多个相位校正块。 模拟运算电路31至34计算每个路径的两个连续导频符号块的接收信号的相位误差。 模拟运算电路40校正已经在两个连续的导频符号块之间接收的信息符号块的接收信号的相位。 RAKE组合器同步地组合每个路径的相位校正的去扩展接收信号。

公开(公告)号：EP0855796A3

公开(公告)日：2002-07-31

申请号：EP98101319.6

申请日：1998-01-26

申请人： Yozan Inc.

发明人： Shou, Guoliang ,  Motohashi, Kazunori ,  Zhou, Changming ,  Yamamoto, Makoto ,  Zhou, Xuping ,  Takatori, Sunao ,  Qin, Xiaoling

IPC分类号： H03H17/02

CPC分类号： H03H17/0254 ,  H04B1/7093

摘要： The invention provides according to a first aspect a low electric power consumption matched filter. The signal received at an input terminal is input to a shift-register having stages equal to the spread code length number after conversion into M-bit digital signals in an analog-to-digital converter. The outputs of the shift-register stages are input to EXCLUSIVE-OR circuits set corresponding to each stage, so that EXCLUSIVE-OR is performed between the outputs and corresponding spread code bits d 1 to d N . The outputs of the EXCLUSIVE-OR circuits are analogously added in an analog adder and output from an output terminal. According to a second aspect the invention provides a filter circuit using an analog operation circuit to prevent lowering of operation accuracy caused by the residual charge. Input analog signals successively undergo sampling and holding in each sampling and holding circuit, are multiplied by coefficients stored in a shift register by multiplication circuits, and added in addition circuit. Sample data transmission error storage is prevented by shifting coefficients in the shift register. Sampling and holding circuits and multiplication circuits are formed by analog operation circuits, and each include a switch for canceling the residual charge. The sampling and holding circuits and multiplication circuits normally working are refreshed sequentially by providing circuits for replacing their function. The addition circuit is set double and refreshed in the same way.

公开(公告)号：EP0855796A2

公开(公告)日：1998-07-29

申请号：EP98101319.6

申请日：1998-01-26

申请人： Yozan Inc.

发明人： Shou, Guoliang ,  Motohashi, Kazunori ,  Zhou, Changming ,  Yamamoto, Makoto ,  Zhou, Xuping ,  Takatori, Sunao ,  Qin, Xiaoling

IPC分类号： H03H17/02

CPC分类号： H03H17/0254 ,  H04B1/7093

摘要： The invention provides according to a first aspect a low electric power consumption matched filter. The signal received at an input terminal is input to a shift-register having stages equal to the spread code length number after conversion into M-bit digital signals in an analog-to-digital converter. The outputs of the shift-register stages are input to EXCLUSIVE-OR circuits set corresponding to each stage, so that EXCLUSIVE-OR is performed between the outputs and corresponding spread code bits d 1 to d N . The outputs of the EXCLUSIVE-OR circuits are analogously added in an analog adder and output from an output terminal. According to a second aspect the invention provides a filter circuit using an analog operation circuit to prevent lowering of operation accuracy caused by the residual charge. Input analog signals successively undergo sampling and holding in each sampling and holding circuit, are multiplied by coefficients stored in a shift register by multiplication circuits, and added in addition circuit. Sample data transmission error storage is prevented by shifting coefficients in the shift register. Sampling and holding circuits and multiplication circuits are formed by analog operation circuits, and each include a switch for canceling the residual charge. The sampling and holding circuits and multiplication circuits normally working are refreshed sequentially by providing circuits for replacing their function. The addition circuit is set double and refreshed in the same way.

摘要翻译： 本发明根据第一方面提供一种低功耗匹配滤波器。 在模数转换器中转换成M位数字信号之后，在输入端接收的信号被输入到具有等于扩展码长度数的级的移位寄存器。 移位寄存器级的输出被输入到对应于每一级设置的EXCLUSIVE-OR电路，从而在输出和对应的扩展码位d1至dN之间执行EXCLUSIVE-OR。 EXCLUSIVE-OR电路的输出类似地添加到模拟加法器中并从输出端子输出。 根据第二方面，本发明提供一种使用模拟运算电路的滤波电路，以防止由剩余电荷引起的操作精度降低。 输入模拟信号在每个采样和保持电路中连续进行采样和保持，乘以乘法电路存储在移位寄存器中的系数，并在加法电路中相加。 通过移位寄存器中的系数来防止采样数据传输错误存储。 采样和保持电路和乘法电路由模拟运算电路形成，并且每个包括用于消除剩余电荷的开关。 正常工作的采样和保持电路和乘法电路通过提供更换其功能的电路来顺序刷新。 加法电路设置为双倍并以相同的方式刷新。