公开(公告)号：EP0874470A3

公开(公告)日：2003-04-16

申请号：EP98106808.3

申请日：1998-04-15

申请人： Yozan, Inc.

发明人： Zhou, Changming ,  Zhou, Xuping ,  Shou, Guoliang

IPC分类号： H04B1/16 ,  H04B1/40

CPC分类号： H04B1/1615 ,  H04W52/029 ,  Y02D70/40

摘要： A waiting circuit incorporated within a portable terminal of a mobile communication system, for detecting a predetermined signal from a base station so as to start other circuits in a sleep mode than the waiting circuit. The predetermined signal is generated in the base station at a speed of a predetermined symbol rate and modulated to be a intermediate frequency signal. The waiting circuit samples the intermediate frequency signal in response to a sampling clock of a speed of an integer times as quick as the symbol rate. The sampled signal is input to a matched filter for multiplying the sampled signal by a predetermined sequence of coefficients. This coefficients corresponds to the intermediate frequency signal sampled by the sub-sampling circuit.

公开(公告)号：EP0874470A2

公开(公告)日：1998-10-28

申请号：EP98106808.3

申请日：1998-04-15

申请人： Yozan Inc.

发明人： Zhou, Changming ,  Zhou, Xuping ,  Shou, Guoliang

IPC分类号： H04B1/16 ,  H04B1/40

CPC分类号： H04B1/1615 ,  H04W52/029 ,  Y02D70/40

摘要： A waiting circuit incorporated within a portable terminal of a mobile communication system, for detecting a predetermined signal from a base station so as to start other circuits in a sleep mode than the waiting circuit. The predetermined signal is generated in the base station at a speed of a predetermined symbol rate and modulated to be a intermediate frequency signal.
The waiting circuit samples the intermediate frequency signal in response to a sampling clock of a speed of an integer times as quick as the symbol rate. The sampled signal is input to a matched filter for multiplying the sampled signal by a predetermined sequence of coefficients. This coefficients corresponds to the intermediate frequency signal sampled by the sub-sampling circuit.

摘要翻译： 一种结合在移动通信系统的便携式终端内的等待电路，用于检测来自基站的预定信号，以便开始休眠模式中的其它电路等于等待电路。 在基站中以预定符号速率的速度生成预定信号，并将其调制为中频信号。 等待电路响应于与符号速率相同的整数倍的速度的采样时钟对中频信号进行采样。 采样信号被输入到匹配滤波器，用于将采样信号乘以预定的系数序列。 该系数对应于由次采样电路采样的中频信号。

公开(公告)号：EP0790712A2

公开(公告)日：1997-08-20

申请号：EP97102710.7

申请日：1997-02-19

申请人： YOZAN INC. ,  KOKUSAI ELECTRIC CO., LTD.

发明人： Zhou, Changming ,  Shou, Guoliang ,  Zhou, Xuping ,  Yamamoto, Makoto ,  Urabe, Kenzo ,  Takatori, Suano

IPC分类号： H04B1/707

CPC分类号： H04B1/7093

摘要： The demodulator has a plurality of matched filters in parallel. Each matched filter has a different binary PN code, a plurality of sample holders, a plurality of multipliers, an adder, and a controller. The sample holders has a common input, a switch, a first capacitor, a first inverse amplifier with an output and an input connected to the common input through the switch and the capacitor, and a first feedback capacitor for feeding the output of the first inverse amplifier back to the input. Each multiplier has a first and second sub-multiplexers, one of sub-multiplexer selecting corresponding sample holder output and another sub-multiplexer selecting a reference voltage.

摘要翻译： 解调器具有并联的多个匹配滤波器。 每个匹配滤波器具有不同的二进制PN码，多个采样保持器，多个乘法器，加法器和控制器。 样本保持器具有公共输入，开关，第一电容器，具有输出的第一反相放大器和通过开关和电容器连接到公共输入的输入端，以及用于馈送第一反相器的输出的第一反馈电容器 放大器返回输入。 每个乘法器具有第一和第二子复用器，子复用器中的一个选择对应的采样保持器输出，另一个副多路复用器选择参考电压。

公开(公告)号：EP0930723A3

公开(公告)日：2003-07-30

申请号：EP99100692.5

申请日：1999-01-14

申请人： Yozan Inc.

发明人： Zhou, Changming ,  Zhou, Xuping

IPC分类号： H04B1/707

CPC分类号： H04B1/70752 ,  H04B1/70735 ,  H04B1/70751 ,  H04B1/7077

摘要： A (direct-sequence code division multiple access) DS-CDMA cellular system includes a plurality of cells each having one base station and a plurality of mobile stations. A signal transmitted form the base station is distinguished by a long code which is different from the others being uniquely allocated to each cell. A long code synchronization timing being detected by a correlation using a common short code. The long codes are searched in each mobile station by a partial correlation in a timing according to the long code synchronization timing. The partial correlation is a correlation between a signal received and a segment of a code defined by a part of the long code, the part being shifted in the long code. Further, the long codes are classified into a plurality of long code groups defined by long code group identification codes. A delay profile of the long code group identification code is detected and is compensated in fading according to said short code. Then, the long code group identification code is combined by rake combining, and is demodulated.

公开(公告)号：EP0932262A3

公开(公告)日：2003-05-14

申请号：EP98124528.5

申请日：1998-12-22

申请人： Yozan Inc. ,  NTT DoCoMo, Inc.

发明人： Zhou, Changming ,  Zhou, Xuping ,  Sawahashi, Mamura ,  Adachi, Fumiyuka

IPC分类号： H04B1/707 ,  H03H17/02

CPC分类号： H04B1/707

摘要： A plurality of sets of spreading code sequences are stored in registers. In case of soft hand-over, multi-code and long-delay paths, it is possible that the correlation peaks derived by the different PN sequences overlap. The spreading code sequences then are shifted by the generator registers in order to separate the peaks by one or more chips.

公开(公告)号：EP0868061A2

公开(公告)日：1998-09-30

申请号：EP98102521.6

申请日：1998-02-13

申请人： Yozan Inc.

发明人： Zhou, Xuping ,  Shou, Guoliang ,  Zhou, Changming

IPC分类号： H04L27/233

CPC分类号： H04L27/2331

摘要： A π/n shift PSK demodulator of this invention is formed with a digital logical means through the following method. XOR4 calculates the ex-OR operation between the present sample through π/4 shift QPSK output from SH2 and the previous one output from SH1. Accumulating 1 among the outputs from XOR4 in the first operation means 5 and multiplying it by π/8 obtains the absolute phase difference between the present and the previous symbols. The former or latter four bits from SH1 are subtracted from the corresponding former or latter four bits from SH2, and the result of each bit is summed and its sign is added to the absolute phase data in sign addition means 10. After the phase offset is subtracted from the outputs from 10, it is demodulated into the original one in judgment circuit 13.

摘要翻译： 本发明的π/ n移位PSK解调器通过以下方法由数字逻辑装置形成。 XOR4通过从SH2输出的pi / 4移位QPSK和SH1的前一个输出计算当前样本之间的异或运算。 在第一操作装置5中从XOR4的输出中累积1，并将其乘以pi / 8获得当前和先前符号之间的绝对相位差。 来自SH1的前者或后面的四位从SH2的相应的前一个或后四位中减去，每个位的结果被相加，并且其符号被加到符号加法装置10中的绝对相位数据。在相位偏移为 从10的输出中减去，在判断电路13中解调为原来的。

公开(公告)号：EP0853388A2

公开(公告)日：1998-07-15

申请号：EP98100151.4

申请日：1998-01-07

申请人： Yozan Inc.

发明人： Shou, Guoliang ,  Zhou, Changming ,  Zhou, Xuping

IPC分类号： H04B1/707 ,  H04B7/005

CPC分类号： H04B1/711 ,  H04B1/7093 ,  H04B1/7117 ,  H04B7/01 ,  H04B2201/70701

摘要： Phases of the spread spectrum signal are corrected with a high degree of accuracy by a minimum of circuitry. One of phase correction circuits 31 - 34 of the receiver corresponds to each path. The I-component and Q-component of a despread output are supplied to the phase correction circuits 31 - 34. A phase error extractor 1 extracts the first phase error from a received pilot block. A phase corrector 2 corrects the phase error of a received information symbol using a correction vector that has been calculated based on the first phase error. The RAKE synthesizer 25 synthesizes the corrected received signal with outputs of the phase correction circuits of other paths and outputs the synthesized signal to a temporary determiner 3 which temporarily determines an information symbol to be processed. The phase error is modified in a correction vector modifier 4 using the temporary determination result. A new correction vector is calculated based on the modified phase error. In this way, the correction vectors are sequentially modified based on the temporary determination results for the information symbols.

摘要翻译： 通过最小的电路以高精度校正扩频信号的相位。 接收机的相位校正电路31-34中的一个对应于每个路径。 解扩输出的I分量和Q分量被提供给相位校正电路31-34。相位误差提取器1从接收的导频块中提取第一相位误差。 相位校正器2使用已经基于第一相位误差计算的校正矢量来校正接收信息符号的相位误差。 RAKE合成器25将校正的接收信号与其他路径的相位校正电路的输出合成，并将该合成信号输出到暂时确定要处理的信息符号的临时确定器3。 使用临时确定结果在校正矢量修改器4中修改相位误差。 基于修正的相位误差计算新的校正矢量。 以这种方式，基于信息符号的临时确定结果，顺序修改校正矢量。

公开(公告)号：EP0886385B1

公开(公告)日：2004-09-22

申请号：EP98111256.8

申请日：1998-06-18

申请人： Yozan Inc. ,  NTT DoCoMo, Inc.

发明人： Zhou, Changming ,  Zhou, Xuping ,  Sawahashi, Mamoru ,  Adachi, Fumiyuki

IPC分类号： H04B1/707

CPC分类号： H04B1/707 ,  H04B1/7115 ,  H04B2201/70701

摘要： A signal reception apparatus for DS-CDMA communication system having a complex matched filter for despreading a received signal into I-and Q-components Di and Dq of despread signal. Di and Dq are input to a path selection portion 13 for extracting a phase error in a pilot symbol block of the despread signal. A phase compensation signal is calculated according to the phase error in the portion 13. An information symbol is compensated according to the phase compensation signal. An electrical power is calculated from an average of the phase compensation signal of several slots for selecting paths to be received. The selected paths are combined with phase synchronized by a rake combiner 14.

公开(公告)号：EP0853388A3

公开(公告)日：2003-01-22

申请号：EP98100151.4

申请日：1998-01-07

申请人： Yozan Inc.

发明人： Shou, Guoliang ,  Zhou, Changming ,  Zhou, Xuping

IPC分类号： H04B1/707 ,  H04L27/38

CPC分类号： H04B1/711 ,  H04B1/7093 ,  H04B1/7117 ,  H04B7/01 ,  H04B2201/70701

摘要： Phases of the spread spectrum signal are corrected with a high degree of accuracy by a minimum of circuitry. One of phase correction circuits 31 - 34 of the receiver corresponds to each path. The I-component and Q-component of a despread output are supplied to the phase correction circuits 31 - 34. A phase error extractor 1 extracts the first phase error from a received pilot block. A phase corrector 2 corrects the phase error of a received information symbol using a correction vector that has been calculated based on the first phase error. The RAKE synthesizer 25 synthesizes the corrected received signal with outputs of the phase correction circuits of other paths and outputs the synthesized signal to a temporary determiner 3 which temporarily determines an information symbol to be processed. The phase error is modified in a correction vector modifier 4 using the temporary determination result. A new correction vector is calculated based on the modified phase error. In this way, the correction vectors are sequentially modified based on the temporary determination results for the information symbols.

公开(公告)号：EP0932262A2

公开(公告)日：1999-07-28

申请号：EP98124528.5

申请日：1998-12-22

申请人： Yozan Inc. ,  Ntt Mobile Communications Network Inc.

发明人： Zhou, Changming ,  Zhou, Xuping ,  Sawahashi, Mamura ,  Adachi, Fumiyuka

IPC分类号： H04B1/707

CPC分类号： H04B1/707

摘要： A plurality of sets of spreading code sequences are store in registers and selectively supplied to matched filters. The soft-handover, multi-code processing and long-delay paths can be processed by a small circuits.

摘要翻译： 多组扩展码序列存储在寄存器中并选择性地提供给匹配滤波器。 软切换，多码处理和长延迟路径可以由小电路处理。