TRANSLATING ATOMIC READ-MODIFY-WRITE ACCESSES

    公开(公告)号:EP3417372A1

    公开(公告)日:2018-12-26

    申请号:EP17708912.5

    申请日:2017-02-09

    CPC classification number: G06F8/52 G06F9/4552

    Abstract: Various systems and methods for translating atomic read-modify-write accesses are described herein. In one example, a method includes determining that a machine instruction of a first language specifies an atomic read-modify-write access. The method includes generating machine instructions of the second language to perform an atomic access for the address if the address is aligned. The method includes generating machine instructions of a second language to acquire a global lock if the address is unaligned. Additionally, the method includes generating machine instructions of the second language to perform a non-atomic access for the address if the address is unaligned. Also, the method includes generating machine instructions of the second language to release the global lock if the address is unaligned.

    CACHING RUNTIME GENERATED CODE
    3.
    发明授权

    公开(公告)号:EP2340481B1

    公开(公告)日:2018-06-13

    申请号:EP09820999.2

    申请日:2009-09-30

    CPC classification number: G06F9/4552

    Abstract: A program entity that generates code but that does not perturb global state is identified. Code produced by the identified program entity can be assigned an identifier and cached the first time it is executed. Subsequent executions of the program entity can eliminate generation of the code and/or translation of the generated code into native binary code. The runtime generated code and native binary code can be cached in a machine-wide cache, or can be added to the metadata of the assembly generated from the source code of the program entity.

    USING A CONVERSION LOOK ASIDE BUFFER TO IMPLEMENT AN INSTRUCTION SET AGNOSTIC RUNTIME ARCHITECTURE
    7.
    发明公开
    USING A CONVERSION LOOK ASIDE BUFFER TO IMPLEMENT AN INSTRUCTION SET AGNOSTIC RUNTIME ARCHITECTURE 审中-公开
    利用查找ASIDE转换缓冲用于实现无关的指令集时体系结构

    公开(公告)号:EP3172665A1

    公开(公告)日:2017-05-31

    申请号:EP15825210.6

    申请日:2015-07-23

    Abstract: A system for an agnostic runtime architecture. The system includes a close to bare metal JIT conversion layer, a runtime native instruction assembly component included within the conversion layer for receiving instructions from a guest virtual machine, and a runtime native instruction sequence formation component included within the conversion layer for receiving instructions from native code. The system further includes a dynamic sequence block-based instruction mapping component included within the conversion layer for code cache allocation and metadata creation, and is coupled to receive inputs from the runtime native instruction assembly component and the runtime native instruction sequence formation component, and wherein the dynamic sequence block-based instruction mapping component receives resulting processed instructions from the runtime native instruction assembly component and the runtime native instruction sequence formation component and allocates the resulting processed instructions to a processor for execution.

    Abstract translation: 一种用于在运行无关的架构体系。 该系统包括一个系统仿真/虚拟化转换器,应用程序代码转换器和转换器,worin系统仿真/虚拟化转换器和应用程序代码转换器执行一个系统仿真过程。 该系统转换器实现了用于从客户图像执行代码,worin系统转换器或系统仿真器的系统和应用程序转换进程访问的客人指令的多个做了包括多个客户分支指令,并且客户指令多元性组装成客户指令 块。 该系统的转换器使得反酸酯客户指令块到对应的本机转换块,存储所述本机转换块划分成本机高速缓存,并存储该客户指令块的映射到在转换后备缓冲器对应的本机转换块。 一旦为一个客户指令的后续请求时,转换后备缓冲器被索引到确定性矿是否发生命中,worin映射指示所述客户指令在本地高速缓存中的相应的转换的本机指令,并且在转发所述转换的本机指令以供执行 响应命中。

    A SYSTEM CONVERTER THAT IMPLEMENTS A RUN AHEAD RUN TIME GUEST INSTRUCTION CONVERSION/DECODING PROCESS AND A PREFETCHING PROCESS WHERE GUEST CODE IS PRE-FETCHED FROM THE TARGET OF GUEST BRANCHES IN AN INSTRUCTION SEQUENCE
    8.
    发明公开
    A SYSTEM CONVERTER THAT IMPLEMENTS A RUN AHEAD RUN TIME GUEST INSTRUCTION CONVERSION/DECODING PROCESS AND A PREFETCHING PROCESS WHERE GUEST CODE IS PRE-FETCHED FROM THE TARGET OF GUEST BRANCHES IN AN INSTRUCTION SEQUENCE 审中-公开
    / - - 履行命令转换的系统变换器解码处理FORWARD-TERM来宾和前进充电过程,在来宾CODE从客户的分枝在命令结构ADVANCE的目的是充电

    公开(公告)号:EP3172664A1

    公开(公告)日:2017-05-31

    申请号:EP15825094.4

    申请日:2015-07-24

    Abstract: A system for an agnostic runtime architecture. The system includes a system emulation/virtualization converter, an application code converter, and a converter wherein a system emulation/virtualization converter and an application code converter implement a system emulation process, and wherein the system converter implements a system and application conversion process for executing code from a guest image, wherein the system converter or the system emulator. The system further includes a run ahead run time guest such an conversion/decoding process, and a prefetching process where guest code is pre-fetched from the target of guest branches in an instruction sequence.

    Abstract translation: 一种用于在运行无关的架构体系。 该系统包括一个系统仿真/虚拟化转换器,应用程序代码转换器,以及worin系统仿真/虚拟化转换器和应用程序代码转换器执行一个系统仿真过程,和worin系统变换器实现了用于执行一个系统和应用程序转换处理的转换器 从客户图像代码,worin系统转换器或系统仿真器。 该系统包括运行再往前运行时间客人试图转换/解码处理,以及预取过程,其中客代码是从客户分支的目标在预取在指令序列。

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